Add support for Generic Node Sensor Edition by TTI

README.md

@@ -420,8 +420,12 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 
 | Status | Device(s) | Name | Release | Notes |
 | :----: | :-------: | ---- | :-----: | :---- |
+| :yellow_heart: | STM32WL55CC | [Generic Node Sensor Edition](https://www.genericnode.com/docs/sensor-edition) (GNSE) by TTI | **2.1.0** | [GNSE GitHub](https://github.com/TheThingsIndustries/generic-node-se) |
+| :yellow_heart: | STM32WL54CC<br>STM32WL55CC | Generic Board | **2.1.0** |  |
 | :yellow_heart: | STM32WL55JC<br>STM32WL55JC | Generic Board | **2.1.0** |  |
+| :yellow_heart: | STM32WLE4C8<br>STM32WLE4CB<br>STM32WLE4CC | Generic Board | **2.1.0** |  |
 | :yellow_heart: | STM32WLE4J8<br>STM32WLE4JB<br>STM32WLE4JC | Generic Board | **2.1.0** |  |
+| :yellow_heart: | STM32WLE5C8<br>STM32WLE5CB<br>STM32WLE5CC | Generic Board | **2.1.0** |  |
 | :yellow_heart: | STM32WLE5J8<br>STM32WLE5JB<br>STM32WLE5JC | Generic Board | **2.1.0** |  |
 
 ### 3D printer boards

boards.txt

@@ -5081,6 +5081,23 @@ GenWL.build.mcu=cortex-m4
 GenWL.build.series=STM32WLxx
 GenWL.build.cmsis_lib_gcc=arm_cortexM4lf_math
 
+# Generic node SE by The Things Industries
+GenWL.menu.pnum.GENERIC_NODE_SE_TTI=Generic Node SE (TTI)
+GenWL.menu.pnum.GENERIC_NODE_SE_TTI.upload.maximum_size=262144
+GenWL.menu.pnum.GENERIC_NODE_SE_TTI.upload.maximum_data_size=65536
+GenWL.menu.pnum.GENERIC_NODE_SE_TTI.build.board=GENERIC_NODE_SE_TTI
+GenWL.menu.pnum.GENERIC_NODE_SE_TTI.build.product_line=STM32WL55xx
+GenWL.menu.pnum.GENERIC_NODE_SE_TTI.build.variant_h=variant_GENERIC_NODE_SE_TTI.h
+GenWL.menu.pnum.GENERIC_NODE_SE_TTI.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
+
+# Generic WL54CCUx
+GenWL.menu.pnum.GENERIC_WL54CCUX=Generic WL54CCUx
+GenWL.menu.pnum.GENERIC_WL54CCUX.upload.maximum_size=262144
+GenWL.menu.pnum.GENERIC_WL54CCUX.upload.maximum_data_size=65536
+GenWL.menu.pnum.GENERIC_WL54CCUX.build.board=GENERIC_WL54CCUX
+GenWL.menu.pnum.GENERIC_WL54CCUX.build.product_line=STM32WL54xx
+GenWL.menu.pnum.GENERIC_WL54CCUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
+
 # Generic WL54JCIx
 GenWL.menu.pnum.GENERIC_WL54JCIX=Generic WL54JCIx
 GenWL.menu.pnum.GENERIC_WL54JCIX.upload.maximum_size=262144
@@ -5089,6 +5106,14 @@ GenWL.menu.pnum.GENERIC_WL54JCIX.build.board=GENERIC_WL54JCIX
 GenWL.menu.pnum.GENERIC_WL54JCIX.build.product_line=STM32WL54xx
 GenWL.menu.pnum.GENERIC_WL54JCIX.build.variant=STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I
 
+# Generic WL55CCUx
+GenWL.menu.pnum.GENERIC_WL55CCUX=Generic WL55CCUx
+GenWL.menu.pnum.GENERIC_WL55CCUX.upload.maximum_size=262144
+GenWL.menu.pnum.GENERIC_WL55CCUX.upload.maximum_data_size=65536
+GenWL.menu.pnum.GENERIC_WL55CCUX.build.board=GENERIC_WL55CCUX
+GenWL.menu.pnum.GENERIC_WL55CCUX.build.product_line=STM32WL55xx
+GenWL.menu.pnum.GENERIC_WL55CCUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
+
 # Generic WL55JCIx
 GenWL.menu.pnum.GENERIC_WL55JCIX=Generic WL55JCIx
 GenWL.menu.pnum.GENERIC_WL55JCIX.upload.maximum_size=262144
@@ -5097,6 +5122,30 @@ GenWL.menu.pnum.GENERIC_WL55JCIX.build.board=GENERIC_WL55JCIX
 GenWL.menu.pnum.GENERIC_WL55JCIX.build.product_line=STM32WL55xx
 GenWL.menu.pnum.GENERIC_WL55JCIX.build.variant=STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I
 
+# Generic WLE4C8Ux
+GenWL.menu.pnum.GENERIC_WLE4C8UX=Generic WLE4C8Ux
+GenWL.menu.pnum.GENERIC_WLE4C8UX.upload.maximum_size=65536
+GenWL.menu.pnum.GENERIC_WLE4C8UX.upload.maximum_data_size=20480
+GenWL.menu.pnum.GENERIC_WLE4C8UX.build.board=GENERIC_WLE4C8UX
+GenWL.menu.pnum.GENERIC_WLE4C8UX.build.product_line=STM32WLE4xx
+GenWL.menu.pnum.GENERIC_WLE4C8UX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
+
+# Generic WLE4CBUx
+GenWL.menu.pnum.GENERIC_WLE4CBUX=Generic WLE4CBUx
+GenWL.menu.pnum.GENERIC_WLE4CBUX.upload.maximum_size=131072
+GenWL.menu.pnum.GENERIC_WLE4CBUX.upload.maximum_data_size=49152
+GenWL.menu.pnum.GENERIC_WLE4CBUX.build.board=GENERIC_WLE4CBUX
+GenWL.menu.pnum.GENERIC_WLE4CBUX.build.product_line=STM32WLE4xx
+GenWL.menu.pnum.GENERIC_WLE4CBUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
+
+# Generic WLE4CCUx
+GenWL.menu.pnum.GENERIC_WLE4CCUX=Generic WLE4CCUx
+GenWL.menu.pnum.GENERIC_WLE4CCUX.upload.maximum_size=262144
+GenWL.menu.pnum.GENERIC_WLE4CCUX.upload.maximum_data_size=65536
+GenWL.menu.pnum.GENERIC_WLE4CCUX.build.board=GENERIC_WLE4CCUX
+GenWL.menu.pnum.GENERIC_WLE4CCUX.build.product_line=STM32WLE4xx
+GenWL.menu.pnum.GENERIC_WLE4CCUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
+
 # Generic WLE4J8Ix
 GenWL.menu.pnum.GENERIC_WLE4J8IX=Generic WLE4J8Ix
 GenWL.menu.pnum.GENERIC_WLE4J8IX.upload.maximum_size=65536
@@ -5121,6 +5170,30 @@ GenWL.menu.pnum.GENERIC_WLE4JCIX.build.board=GENERIC_WLE4JCIX
 GenWL.menu.pnum.GENERIC_WLE4JCIX.build.product_line=STM32WLE4xx
 GenWL.menu.pnum.GENERIC_WLE4JCIX.build.variant=STM32WLxx/WL54JCI_WL55JCI_WLE4J(8-B-C)I_WLE5J(8-B-C)I
 
+# Generic WLE5C8Ux
+GenWL.menu.pnum.GENERIC_WLE5C8UX=Generic WLE5C8Ux
+GenWL.menu.pnum.GENERIC_WLE5C8UX.upload.maximum_size=65536
+GenWL.menu.pnum.GENERIC_WLE5C8UX.upload.maximum_data_size=20480
+GenWL.menu.pnum.GENERIC_WLE5C8UX.build.board=GENERIC_WLE5C8UX
+GenWL.menu.pnum.GENERIC_WLE5C8UX.build.product_line=STM32WLE5xx
+GenWL.menu.pnum.GENERIC_WLE5C8UX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
+
+# Generic WLE5CBUx
+GenWL.menu.pnum.GENERIC_WLE5CBUX=Generic WLE5CBUx
+GenWL.menu.pnum.GENERIC_WLE5CBUX.upload.maximum_size=131072
+GenWL.menu.pnum.GENERIC_WLE5CBUX.upload.maximum_data_size=49152
+GenWL.menu.pnum.GENERIC_WLE5CBUX.build.board=GENERIC_WLE5CBUX
+GenWL.menu.pnum.GENERIC_WLE5CBUX.build.product_line=STM32WLE5xx
+GenWL.menu.pnum.GENERIC_WLE5CBUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
+
+# Generic WLE5CCUx
+GenWL.menu.pnum.GENERIC_WLE5CCUX=Generic WLE5CCUx
+GenWL.menu.pnum.GENERIC_WLE5CCUX.upload.maximum_size=262144
+GenWL.menu.pnum.GENERIC_WLE5CCUX.upload.maximum_data_size=65536
+GenWL.menu.pnum.GENERIC_WLE5CCUX.build.board=GENERIC_WLE5CCUX
+GenWL.menu.pnum.GENERIC_WLE5CCUX.build.product_line=STM32WLE5xx
+GenWL.menu.pnum.GENERIC_WLE5CCUX.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U
+
 # Generic WLE5J8Ix
 GenWL.menu.pnum.GENERIC_WLE5J8IX=Generic WLE5J8Ix
 GenWL.menu.pnum.GENERIC_WLE5J8IX.upload.maximum_size=65536

variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/generic_clock.c

@@ -23,8 +23,36 @@
   */
 WEAK void SystemClock_Config(void)
 {
-  /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+  RCC_OscInitTypeDef RCC_OscInitStruct = {};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+  /** Initializes the CPU, AHB and APB busses clocks
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+  RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+  RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+  /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK3 | RCC_CLOCKTYPE_HCLK
+                                | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1
+                                | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
+    Error_Handler();
+  }
 }
 
 #endif /* ARDUINO_GENERIC_* */

variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/ldscript.ld

@@ -0,0 +1,186 @@
+/*
+******************************************************************************
+**
+**  File        : ldscript.ld
+**
+**  Author      : STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32WL55xC Device
+**                      256Kbytes FLASH
+**                      64Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
+** All rights reserved.</center></h2>
+**
+** This software component is licensed by ST under BSD 3-Clause license,
+** the "License"; You may not use this file except in compliance with the
+** License. You may obtain a copy of the License at:
+**                        opensource.org/licenses/BSD-3-Clause
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200 ; /* required amount of heap  */
+_Min_Stack_Size = 0x400 ; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM   (xrw)   : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
+  FLASH   (rx)   : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM : {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array     :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .init_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .fini_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}