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adds remaining masks and mask select #417

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Merged
merged 1 commit into from
Apr 6, 2018
Merged

adds remaining masks and mask select #417

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9 changes: 7 additions & 2 deletions coresimd/aarch64/neon.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -18,24 +18,29 @@ impl_from_bits_!(
float64x1_t: u32x2,
i32x2,
f32x2,
m32x2,
u16x4,
i16x4,
m16x4,
u8x8,
i8x8,
b8x8
m8x8
);
impl_from_bits_!(
float64x2_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);

/// Vector add.
Expand Down
95 changes: 74 additions & 21 deletions coresimd/arm/neon.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -70,245 +70,298 @@ impl_from_bits_!(
int8x8_t: u32x2,
i32x2,
f32x2,
m32x2,
u16x4,
i16x4,
m16x4,
u8x8,
i8x8,
b8x8
m8x8
);
impl_from_bits_!(
uint8x8_t: u32x2,
i32x2,
f32x2,
m32x2,
u16x4,
i16x4,
m16x4,
u8x8,
i8x8,
b8x8
m8x8
);
impl_from_bits_!(
int16x4_t: u32x2,
i32x2,
f32x2,
m32x2,
u16x4,
i16x4,
m16x4,
u8x8,
i8x8,
b8x8
m8x8
);
impl_from_bits_!(
uint16x4_t: u32x2,
i32x2,
f32x2,
m32x2,
u16x4,
i16x4,
m16x4,
u8x8,
i8x8,
b8x8
m8x8
);
impl_from_bits_!(
int32x2_t: u32x2,
i32x2,
f32x2,
m32x2,
u16x4,
i16x4,
m16x4,
u8x8,
i8x8,
b8x8
m8x8
);
impl_from_bits_!(
uint32x2_t: u32x2,
i32x2,
f32x2,
m32x2,
u16x4,
i16x4,
m16x4,
u8x8,
i8x8,
b8x8
m8x8
);
impl_from_bits_!(
int64x1_t: u32x2,
i32x2,
f32x2,
m32x2,
u16x4,
i16x4,
m16x4,
u8x8,
i8x8,
b8x8
m8x8
);
impl_from_bits_!(
float32x2_t: u32x2,
i32x2,
f32x2,
m32x2,
u16x4,
i16x4,
m16x4,
u8x8,
i8x8,
b8x8
m8x8
);
impl_from_bits_!(
poly8x8_t: u32x2,
i32x2,
f32x2,
m32x2,
u16x4,
i16x4,
m16x4,
u8x8,
i8x8,
b8x8
m8x8
);
impl_from_bits_!(
poly16x4_t: u32x2,
i32x2,
f32x2,
m32x2,
u16x4,
i16x4,
m16x4,
u8x8,
i8x8,
b8x8
m8x8
);

impl_from_bits_!(
int8x16_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);
impl_from_bits_!(
uint8x16_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);
impl_from_bits_!(
poly8x16_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);
impl_from_bits_!(
int16x8_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);
impl_from_bits_!(
uint16x8_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);
impl_from_bits_!(
poly16x8_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);
impl_from_bits_!(
int32x4_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);
impl_from_bits_!(
uint32x4_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);
impl_from_bits_!(
float32x4_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);
impl_from_bits_!(
int64x2_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);
impl_from_bits_!(
uint64x2_t: u64x2,
i64x2,
f64x2,
m64x2,
u32x4,
i32x4,
f32x4,
m32x4,
u16x8,
i16x8,
m16x8,
u8x16,
i8x16,
b8x16
m8x16
);

#[allow(improper_ctypes)]
Expand Down
4 changes: 2 additions & 2 deletions coresimd/ppsv/api/bitwise_ops.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -123,10 +123,10 @@ macro_rules! test_int_bitwise_ops {
}

#[cfg(test)]
macro_rules! test_bool_bitwise_ops {
macro_rules! test_mask_bitwise_ops {
($id:ident) => {
#[test]
fn bool_arithmetic() {
fn mask_bitwise_ops() {
use coresimd::simd::*;

let t = $id::splat(true);
Expand Down
4 changes: 2 additions & 2 deletions coresimd/ppsv/api/bitwise_reductions.rs
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
//! Implements portable bitwise vector reductions.
//! Implements portable horizontal bitwise vector reductions.
#![allow(unused)]

macro_rules! impl_bitwise_reductions {
Expand Down Expand Up @@ -67,7 +67,7 @@ macro_rules! impl_bitwise_reductions {
};
}

macro_rules! impl_bool_bitwise_reductions {
macro_rules! impl_mask_bitwise_reductions {
($id:ident, $elem_ty:ident, $internal_ty:ident) => {
impl $id {
/// Lane-wise bitwise `and` of the vector elements.
Expand Down
4 changes: 2 additions & 2 deletions coresimd/ppsv/api/bitwise_scalar_ops.rs
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
//! Lane-wise bitwise operations for integer and boolean vectors.
//! Lane-wise bitwise operations for integer vectors and vector masks.
#![allow(unused)]

macro_rules! impl_bitwise_scalar_ops {
Expand Down Expand Up @@ -156,7 +156,7 @@ macro_rules! test_int_bitwise_scalar_ops {
}

#[cfg(test)]
macro_rules! test_bool_bitwise_scalar_ops {
macro_rules! test_mask_bitwise_scalar_ops {
($id:ident) => {
#[test]
fn bool_scalar_arithmetic() {
Expand Down
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