From 81f63a95da21b1bd717db91320eae6fe398b9dc1 Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Mon, 13 Nov 2023 17:50:04 +0100
Subject: [PATCH 01/15] add c2

---
 cores/esp32/Esp.cpp                           | 115 ++++++++++++++----
 cores/esp32/HardwareSerial.h                  |   8 ++
 cores/esp32/esp32-hal-cpu.c                   |  10 +-
 cores/esp32/esp32-hal-i2c-slave.c             |   4 +-
 cores/esp32/esp32-hal-matrix.c                |   2 +
 cores/esp32/esp32-hal-misc.c                  |   4 +-
 cores/esp32/esp32-hal-rgb-led.c               |   5 +
 cores/esp32/esp32-hal-spi.c                   |  85 +++++++------
 cores/esp32/esp32-hal-spi.h                   |   2 +-
 idf_component.yml                             |   2 +
 .../examples/ResetReason/ResetReason.ino      |   2 +
 libraries/SPI/src/SPI.cpp                     |   2 +-
 libraries/Wire/src/Wire.cpp                   |   6 +-
 platform.txt                                  |   2 +
 variants/esp32c2/pins_arduino.h               |  29 +++++
 15 files changed, 208 insertions(+), 70 deletions(-)
 create mode 100644 variants/esp32c2/pins_arduino.h

diff --git a/cores/esp32/Esp.cpp b/cores/esp32/Esp.cpp
index 7d35fa5bedc..1579c872a1d 100644
--- a/cores/esp32/Esp.cpp
+++ b/cores/esp32/Esp.cpp
@@ -48,6 +48,9 @@ extern "C" {
 #include "esp32s3/rom/spi_flash.h"
 #include "soc/efuse_reg.h"
 #define ESP_FLASH_IMAGE_BASE 0x0000     // Esp32s3 is located at 0x0000
+#elif CONFIG_IDF_TARGET_ESP32C2
+#include "esp32c2/rom/spi_flash.h"
+#define ESP_FLASH_IMAGE_BASE 0x0000     // Esp32c2 is located at 0x0000
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/spi_flash.h"
 #define ESP_FLASH_IMAGE_BASE 0x0000     // Esp32c3 is located at 0x0000
@@ -366,7 +369,7 @@ FlashMode_t EspClass::getFlashChipMode(void)
    #if CONFIG_IDF_TARGET_ESP32S2
    uint32_t spi_ctrl = REG_READ(PERIPHS_SPI_FLASH_CTRL);
    #else
-   #if CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6
+   #if CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
    uint32_t spi_ctrl = REG_READ(DR_REG_SPI0_BASE + 0x8);
    #else
    uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0));
@@ -391,36 +394,106 @@ FlashMode_t EspClass::getFlashChipMode(void)
 
 uint32_t EspClass::magicFlashChipSize(uint8_t byte)
 {
+/*
+    FLASH_SIZES = {
+        "1MB": 0x00,
+        "2MB": 0x10,
+        "4MB": 0x20,
+        "8MB": 0x30,
+        "16MB": 0x40,
+        "32MB": 0x50,
+        "64MB": 0x60,
+        "128MB": 0x70,
+    }
+*/
     switch(byte & 0x0F) {
-    case 0x0: // 8 MBit (1MB)
-        return (1_MB);
-    case 0x1: // 16 MBit (2MB)
-        return (2_MB);
-    case 0x2: // 32 MBit (4MB)
-        return (4_MB);
-    case 0x3: // 64 MBit (8MB)
-        return (8_MB);
-    case 0x4: // 128 MBit (16MB)
-        return (16_MB);
-    default: // fail?
+      case 0x0: return (1_MB);   // 8 MBit (1MB)
+      case 0x1: return (2_MB);   // 16 MBit (2MB)
+      case 0x2: return (4_MB);   // 32 MBit (4MB)
+      case 0x3: return (8_MB);   // 64 MBit (8MB)
+      case 0x4: return (16_MB);  // 128 MBit (16MB)
+      case 0x5: return (32_MB);  // 256 MBit (32MB)
+      case 0x6: return (64_MB);  // 512 MBit (64MB)
+      case 0x7: return (128_MB); // 1 GBit (128MB)
+      default: // fail?
         return 0;
     }
 }
 
 uint32_t EspClass::magicFlashChipSpeed(uint8_t byte)
 {
+#if CONFIG_IDF_TARGET_ESP32C2
+/*
+    FLASH_FREQUENCY = {
+        "60m": 0xF,
+        "30m": 0x0,
+        "20m": 0x1,
+        "15m": 0x2,
+    }
+*/
     switch(byte & 0x0F) {
-    case 0x0: // 40 MHz
-        return (40_MHz);
-    case 0x1: // 26 MHz
-        return (26_MHz);
-    case 0x2: // 20 MHz
-        return (20_MHz);
-    case 0xf: // 80 MHz
-        return (80_MHz);
-    default: // fail?
+      case 0xF: return (60_MHz);
+      case 0x0: return (30_MHz);
+      case 0x1: return (20_MHz);
+      case 0x2: return (15_MHz);
+      default: // fail?
         return 0;
     }
+
+
+#elif CONFIG_IDF_TARGET_ESP32C6
+/*
+   FLASH_FREQUENCY = {
+        "80m": 0x0,  # workaround for wrong mspi HS div value in ROM
+        "40m": 0x0,
+        "20m": 0x2,
+    }
+*/
+    switch(byte & 0x0F) {
+      case 0x0: return (80_MHz);
+      case 0x2: return (20_MHz);
+      default: // fail?
+        return 0;
+    }
+
+#elif CONFIG_IDF_TARGET_ESP32H2
+
+/*
+    FLASH_FREQUENCY = {
+        "48m": 0xF,
+        "24m": 0x0,
+        "16m": 0x1,
+        "12m": 0x2,
+    }
+*/
+    switch(byte & 0x0F) {
+      case 0xF: return (48_MHz);
+      case 0x0: return (24_MHz);
+      case 0x1: return (16_MHz);
+      case 0x2: return (12_MHz);
+      default: // fail?
+        return 0;
+    }
+
+
+#else
+/*
+    FLASH_FREQUENCY = {
+        "80m": 0xF,
+        "40m": 0x0,
+        "26m": 0x1,
+        "20m": 0x2,
+    }
+*/
+    switch(byte & 0x0F) {
+      case 0xF: return (80_MHz);
+      case 0x0: return (40_MHz);
+      case 0x1: return (26_MHz);
+      case 0x2: return (20_MHz);
+      default: // fail?
+        return 0;
+    }
+#endif
 }
 
 FlashMode_t EspClass::magicFlashChipMode(uint8_t byte)
diff --git a/cores/esp32/HardwareSerial.h b/cores/esp32/HardwareSerial.h
index a05cb0ac9fd..fe261b38ea0 100644
--- a/cores/esp32/HardwareSerial.h
+++ b/cores/esp32/HardwareSerial.h
@@ -118,6 +118,8 @@ typedef enum {
     #define SOC_RX0 (gpio_num_t)3
   #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
     #define SOC_RX0 (gpio_num_t)44
+  #elif CONFIG_IDF_TARGET_ESP32C2
+    #define SOC_RX0 (gpio_num_t)19
   #elif CONFIG_IDF_TARGET_ESP32C3
     #define SOC_RX0 (gpio_num_t)20
   #elif CONFIG_IDF_TARGET_ESP32C6
@@ -132,6 +134,8 @@ typedef enum {
     #define SOC_TX0 (gpio_num_t)1
   #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
     #define SOC_TX0 (gpio_num_t)43
+  #elif CONFIG_IDF_TARGET_ESP32C2
+    #define SOC_TX0 (gpio_num_t)20
   #elif CONFIG_IDF_TARGET_ESP32C3
     #define SOC_TX0 (gpio_num_t)21
   #elif CONFIG_IDF_TARGET_ESP32C6
@@ -149,6 +153,8 @@ typedef enum {
       #define RX1 (gpio_num_t)26
     #elif CONFIG_IDF_TARGET_ESP32S2
       #define RX1 (gpio_num_t)4
+    #elif CONFIG_IDF_TARGET_ESP32C2
+      #define RX1 (gpio_num_t)9
     #elif CONFIG_IDF_TARGET_ESP32C3
       #define RX1 (gpio_num_t)18
     #elif CONFIG_IDF_TARGET_ESP32S3
@@ -165,6 +171,8 @@ typedef enum {
       #define TX1 (gpio_num_t)27
     #elif CONFIG_IDF_TARGET_ESP32S2
       #define TX1 (gpio_num_t)5
+    #elif CONFIG_IDF_TARGET_ESP32C2
+      #define TX1 (gpio_num_t)10
     #elif CONFIG_IDF_TARGET_ESP32C3
       #define TX1 (gpio_num_t)19
     #elif CONFIG_IDF_TARGET_ESP32S3
diff --git a/cores/esp32/esp32-hal-cpu.c b/cores/esp32/esp32-hal-cpu.c
index 915a3211d7a..e6ea4de8d25 100644
--- a/cores/esp32/esp32-hal-cpu.c
+++ b/cores/esp32/esp32-hal-cpu.c
@@ -19,7 +19,7 @@
 #include "esp_attr.h"
 #include "esp_log.h"
 #include "soc/rtc.h"
-#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 #include "soc/rtc_cntl_reg.h"
 #include "soc/apb_ctrl_reg.h"
 #endif
@@ -38,6 +38,8 @@
 #elif CONFIG_IDF_TARGET_ESP32S3
 #include "freertos/xtensa_timer.h"
 #include "esp32s3/rom/rtc.h"
+#elif CONFIG_IDF_TARGET_ESP32C2
+#include "esp32c2/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32C6
@@ -153,7 +155,7 @@ bool removeApbChangeCallback(void * arg, apb_change_cb_t cb){
 }
 
 static uint32_t calculateApb(rtc_cpu_freq_config_t * conf){
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
 	return APB_CLK_FREQ;
 #else
     if(conf->freq_mhz >= 80){
@@ -228,7 +230,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
     }
     //Make the frequency change
     rtc_clk_cpu_freq_set_config_fast(&conf);
-#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
     if(capb != apb){
         //Update REF_TICK (uncomment if REF_TICK is different than 1MHz)
         //if(conf.freq_mhz < 80){
@@ -241,7 +243,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
     }
 #endif
     //Update FreeRTOS Tick Divisor
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
 
 #elif CONFIG_IDF_TARGET_ESP32S3
 
diff --git a/cores/esp32/esp32-hal-i2c-slave.c b/cores/esp32/esp32-hal-i2c-slave.c
index 10629e48f28..5151b38cd2d 100644
--- a/cores/esp32/esp32-hal-i2c-slave.c
+++ b/cores/esp32/esp32-hal-i2c-slave.c
@@ -168,7 +168,7 @@ static inline void i2c_ll_stretch_clr(i2c_dev_t *hw)
 
 static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)
 {
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
     return hw->sr.slave_addressed;
 #else
     return hw->status_reg.slave_addressed;
@@ -177,7 +177,7 @@ static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)
 
 static inline bool i2c_ll_slave_rw(i2c_dev_t *hw)//not exposed by hal_ll
 {
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
     return hw->sr.slave_rw;
 #else
     return hw->status_reg.slave_rw;
diff --git a/cores/esp32/esp32-hal-matrix.c b/cores/esp32/esp32-hal-matrix.c
index 8f2f7d88903..9174ae373ca 100644
--- a/cores/esp32/esp32-hal-matrix.c
+++ b/cores/esp32/esp32-hal-matrix.c
@@ -24,6 +24,8 @@
 #include "esp32s2/rom/gpio.h"
 #elif CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/rom/gpio.h"
+#elif CONFIG_IDF_TARGET_ESP32C2
+#include "esp32c2/rom/gpio.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/gpio.h"
 #elif CONFIG_IDF_TARGET_ESP32C6
diff --git a/cores/esp32/esp32-hal-misc.c b/cores/esp32/esp32-hal-misc.c
index ae1083c9a7a..c5973fbbba5 100644
--- a/cores/esp32/esp32-hal-misc.c
+++ b/cores/esp32/esp32-hal-misc.c
@@ -29,7 +29,7 @@
 #endif //CONFIG_BT_ENABLED
 #include <sys/time.h>
 #include "soc/rtc.h"
-#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 #include "soc/rtc_cntl_reg.h"
 #include "soc/apb_ctrl_reg.h"
 #endif
@@ -45,6 +45,8 @@
 #include "esp32s2/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/rom/rtc.h"
+#elif CONFIG_IDF_TARGET_ESP32C2
+#include "esp32c2/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32C6
diff --git a/cores/esp32/esp32-hal-rgb-led.c b/cores/esp32/esp32-hal-rgb-led.c
index 27aee7bfac4..d3fbcff7020 100644
--- a/cores/esp32/esp32-hal-rgb-led.c
+++ b/cores/esp32/esp32-hal-rgb-led.c
@@ -1,3 +1,6 @@
+#include "soc/soc_caps.h"
+#if SOC_RMT_SUPPORTED
+
 #include "esp32-hal-rgb-led.h"
 
 
@@ -35,3 +38,5 @@ void neopixelWrite(uint8_t pin, uint8_t red_val, uint8_t green_val, uint8_t blue
   }
   rmtWrite(pin, led_data, RMT_SYMBOLS_OF(led_data), RMT_WAIT_FOR_EVER);
 }
+
+#endif /* SOC_RMT_SUPPORTED */
\ No newline at end of file
diff --git a/cores/esp32/esp32-hal-spi.c b/cores/esp32/esp32-hal-spi.c
index a850e5ea317..784d21d581f 100644
--- a/cores/esp32/esp32-hal-spi.c
+++ b/cores/esp32/esp32-hal-spi.c
@@ -43,6 +43,9 @@
 #include "soc/dport_reg.h"
 #include "esp32s3/rom/ets_sys.h"
 #include "esp32s3/rom/gpio.h"
+#elif CONFIG_IDF_TARGET_ESP32C2
+#include "esp32c2/rom/ets_sys.h"
+#include "esp32c2/rom/gpio.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/ets_sys.h"
 #include "esp32c3/rom/gpio.h"
@@ -93,7 +96,7 @@ struct spi_struct_t {
 #define SPI_FSPI_SS_IDX(n)  ((n==0)?FSPICS0_OUT_IDX:((n==1)?FSPICS1_OUT_IDX:0))
 #define SPI_SS_IDX(p, n)    ((p==0)?SPI_FSPI_SS_IDX(n):((p==1)?SPI_HSPI_SS_IDX(n):0))
 
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
 // ESP32C3
 #define SPI_COUNT           (1)
 
@@ -131,6 +134,8 @@ static spi_t _spi_bus_array[] = {
 #elif CONFIG_IDF_TARGET_ESP32S3
     {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1},
     {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 1, -1, -1, -1, -1}
+#elif CONFIG_IDF_TARGET_ESP32C2
+    {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1}
 #elif CONFIG_IDF_TARGET_ESP32C3
     {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1}
 #elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
@@ -154,6 +159,8 @@ static spi_t _spi_bus_array[] = {
 #elif CONFIG_IDF_TARGET_ESP32S3
     {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1},
     {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 1, -1, -1, -1, -1}
+#elif CONFIG_IDF_TARGET_ESP32C2
+    {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1}
 #elif CONFIG_IDF_TARGET_ESP32C3
     {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1}
 #elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
@@ -333,7 +340,7 @@ void spiEnableSSPins(spi_t * spi, uint8_t cs_mask)
         return;
     }
     SPI_MUTEX_LOCK();
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->misc.val &= ~(cs_mask & SPI_CS_MASK_ALL);
 #else
     spi->dev->pin.val &= ~(cs_mask & SPI_CS_MASK_ALL);
@@ -347,7 +354,7 @@ void spiDisableSSPins(spi_t * spi, uint8_t cs_mask)
         return;
     }
     SPI_MUTEX_LOCK();
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->misc.val |= (cs_mask & SPI_CS_MASK_ALL);
 #else
     spi->dev->pin.val |= (cs_mask & SPI_CS_MASK_ALL);
@@ -383,7 +390,7 @@ void spiSSSet(spi_t * spi)
         return;
     }
     SPI_MUTEX_LOCK();
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->misc.cs_keep_active = 1;
 #else
     spi->dev->pin.cs_keep_active = 1;
@@ -397,7 +404,7 @@ void spiSSClear(spi_t * spi)
         return;
     }
     SPI_MUTEX_LOCK();
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->misc.cs_keep_active = 0;
 #else
     spi->dev->pin.cs_keep_active = 0;
@@ -428,7 +435,7 @@ uint8_t spiGetDataMode(spi_t * spi)
     if(!spi) {
         return 0;
     }
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     bool idleEdge = spi->dev->misc.ck_idle_edge;
 #else
     bool idleEdge = spi->dev->pin.ck_idle_edge;
@@ -454,7 +461,7 @@ void spiSetDataMode(spi_t * spi, uint8_t dataMode)
     SPI_MUTEX_LOCK();
     switch (dataMode) {
     case SPI_MODE1:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         spi->dev->misc.ck_idle_edge = 0;
 #else
         spi->dev->pin.ck_idle_edge = 0;
@@ -462,7 +469,7 @@ void spiSetDataMode(spi_t * spi, uint8_t dataMode)
         spi->dev->user.ck_out_edge = 1;
         break;
     case SPI_MODE2:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         spi->dev->misc.ck_idle_edge = 1;
 #else
         spi->dev->pin.ck_idle_edge = 1;
@@ -470,7 +477,7 @@ void spiSetDataMode(spi_t * spi, uint8_t dataMode)
         spi->dev->user.ck_out_edge = 1;
         break;
     case SPI_MODE3:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         spi->dev->misc.ck_idle_edge = 1;
 #else
         spi->dev->pin.ck_idle_edge = 1;
@@ -479,7 +486,7 @@ void spiSetDataMode(spi_t * spi, uint8_t dataMode)
         break;
     case SPI_MODE0:
     default:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         spi->dev->misc.ck_idle_edge = 0;
 #else
         spi->dev->pin.ck_idle_edge = 0;
@@ -532,7 +539,7 @@ static void spiInitBus(spi_t * spi)
     spi->dev->slave.trans_done = 0;
 #endif
     spi->dev->slave.val = 0;
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->misc.val = 0;
 #else
     spi->dev->pin.val = 0;
@@ -613,14 +620,14 @@ spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_
         DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI01_CLK_EN);
         DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI01_RST);
     }
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     periph_ll_reset( PERIPH_SPI2_MODULE );
     periph_ll_enable_clk_clear_rst( PERIPH_SPI2_MODULE );
 #endif
 
     SPI_MUTEX_LOCK();
     spiInitBus(spi);
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->clk_gate.clk_en = 1;
     spi->dev->clk_gate.mst_clk_sel = 1;
     spi->dev->clk_gate.mst_clk_active = 1;
@@ -663,7 +670,7 @@ void spiWaitReady(spi_t * spi)
 #if CONFIG_IDF_TARGET_ESP32S2
 #define usr_mosi_dbitlen usr_mosi_bit_len
 #define usr_miso_dbitlen usr_miso_bit_len
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
 #define usr_mosi_dbitlen ms_data_bitlen
 #define usr_miso_dbitlen ms_data_bitlen
 #define mosi_dlen ms_dlen
@@ -691,7 +698,7 @@ void spiWrite(spi_t * spi, const uint32_t *data, uint8_t len)
         spi->dev->data_buf[i] = data[i];
 #endif
     }
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -719,7 +726,7 @@ void spiTransfer(spi_t * spi, uint32_t *data, uint8_t len)
         spi->dev->data_buf[i] = data[i];
 #endif
     }
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -751,7 +758,7 @@ void spiWriteByte(spi_t * spi, uint8_t data)
     spi->dev->data_buf[0] = data;
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -773,7 +780,7 @@ uint8_t spiTransferByte(spi_t * spi, uint8_t data)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -816,7 +823,7 @@ void spiWriteWord(spi_t * spi, uint16_t data)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -841,7 +848,7 @@ uint16_t spiTransferWord(spi_t * spi, uint16_t data)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -877,7 +884,7 @@ void spiWriteLong(spi_t * spi, uint32_t data)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -902,7 +909,7 @@ uint32_t spiTransferLong(spi_t * spi, uint32_t data)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -953,7 +960,7 @@ static void __spiTransferBytes(spi_t * spi, const uint8_t * data, uint8_t * out,
     #endif
     }
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1025,7 +1032,7 @@ void spiTransaction(spi_t * spi, uint32_t clockDiv, uint8_t dataMode, uint8_t bi
     spi->dev->clock.val = clockDiv;
     switch (dataMode) {
     case SPI_MODE1:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         spi->dev->misc.ck_idle_edge = 0;
 #else
         spi->dev->pin.ck_idle_edge = 0;
@@ -1033,7 +1040,7 @@ void spiTransaction(spi_t * spi, uint32_t clockDiv, uint8_t dataMode, uint8_t bi
         spi->dev->user.ck_out_edge = 1;
         break;
     case SPI_MODE2:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         spi->dev->misc.ck_idle_edge = 1;
 #else
         spi->dev->pin.ck_idle_edge = 1;
@@ -1041,7 +1048,7 @@ void spiTransaction(spi_t * spi, uint32_t clockDiv, uint8_t dataMode, uint8_t bi
         spi->dev->user.ck_out_edge = 1;
         break;
     case SPI_MODE3:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         spi->dev->misc.ck_idle_edge = 1;
 #else
         spi->dev->pin.ck_idle_edge = 1;
@@ -1050,7 +1057,7 @@ void spiTransaction(spi_t * spi, uint32_t clockDiv, uint8_t dataMode, uint8_t bi
         break;
     case SPI_MODE0:
     default:
-#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         spi->dev->misc.ck_idle_edge = 0;
 #else
         spi->dev->pin.ck_idle_edge = 0;
@@ -1097,7 +1104,7 @@ void ARDUINO_ISR_ATTR spiWriteByteNL(spi_t * spi, uint8_t data)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1117,7 +1124,7 @@ uint8_t spiTransferByteNL(spi_t * spi, uint8_t data)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1148,7 +1155,7 @@ void ARDUINO_ISR_ATTR spiWriteShortNL(spi_t * spi, uint16_t data)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1171,7 +1178,7 @@ uint16_t spiTransferShortNL(spi_t * spi, uint16_t data)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1205,7 +1212,7 @@ void ARDUINO_ISR_ATTR spiWriteLongNL(spi_t * spi, uint32_t data)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1228,7 +1235,7 @@ uint32_t spiTransferLongNL(spi_t * spi, uint32_t data)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1271,7 +1278,7 @@ void spiWriteNL(spi_t * spi, const void * data_in, uint32_t len){
             spi->dev->data_buf[i] = data[i];
         #endif
         }
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         spi->dev->cmd.update = 1;
         while (spi->dev->cmd.update);
 #endif
@@ -1319,7 +1326,7 @@ void spiTransferBytesNL(spi_t * spi, const void * data_in, uint8_t * data_out, u
             #endif
             }
         }
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         spi->dev->cmd.update = 1;
         while (spi->dev->cmd.update);
 #endif
@@ -1394,7 +1401,7 @@ void spiTransferBitsNL(spi_t * spi, uint32_t data, uint32_t * out, uint8_t bits)
 #else
     spi->dev->data_buf[0] = data;
 #endif
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
     spi->dev->cmd.update = 1;
     while (spi->dev->cmd.update);
 #endif
@@ -1468,7 +1475,7 @@ void ARDUINO_ISR_ATTR spiWritePixelsNL(spi_t * spi, const void * data_in, uint32
             #endif
             }
         }
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         spi->dev->cmd.update = 1;
         while (spi->dev->cmd.update);
 #endif
@@ -1494,7 +1501,7 @@ typedef union {
             uint32_t clkcnt_l:       6;                     /*it must be equal to spi_clkcnt_N.*/
             uint32_t clkcnt_h:       6;                     /*it must be floor((spi_clkcnt_N+1)/2-1).*/
             uint32_t clkcnt_n:       6;                     /*it is the divider of spi_clk. So spi_clk frequency is system/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1)*/
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
             uint32_t clkdiv_pre:     4;                     /*it is pre-divider of spi_clk.*/
             uint32_t reserved:       9;  					/*reserved*/
 #else
@@ -1541,7 +1548,7 @@ uint32_t spiFrequencyToClockDiv(uint32_t freq)
 
         while(calPreVari++ <= 1) {
             calPre = (((apb_freq / (reg.clkcnt_n + 1)) / freq) - 1) + calPreVari;
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
             if(calPre > 0xF) {
                 reg.clkdiv_pre = 0xF;
 #else
diff --git a/cores/esp32/esp32-hal-spi.h b/cores/esp32/esp32-hal-spi.h
index 640501d6415..63ab88bcd33 100644
--- a/cores/esp32/esp32-hal-spi.h
+++ b/cores/esp32/esp32-hal-spi.h
@@ -28,7 +28,7 @@ extern "C" {
 
 #define SPI_HAS_TRANSACTION
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32S3
+#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32S3
 #define FSPI  0
 #define HSPI  1
 #else
diff --git a/idf_component.yml b/idf_component.yml
index 5467222be8b..cbeb0a0f3d9 100644
--- a/idf_component.yml
+++ b/idf_component.yml
@@ -4,6 +4,7 @@ targets:
   - esp32
   - esp32s2
   - esp32s3
+  - esp32c2
   - esp32c3
   - esp32c6
   - esp32h2
@@ -15,6 +16,7 @@ files:
     - "variants/esp32/**/*"
     - "variants/esp32s2/**/*"
     - "variants/esp32s3/**/*"
+    - "variants/esp32c2/**/*"
     - "variants/esp32c3/**/*"
     - "variants/esp32c6/**/*"
     - "variants/esp32h2/**/*"
diff --git a/libraries/ESP32/examples/ResetReason/ResetReason.ino b/libraries/ESP32/examples/ResetReason/ResetReason.ino
index 4c3243de84a..476178420c6 100644
--- a/libraries/ESP32/examples/ResetReason/ResetReason.ino
+++ b/libraries/ESP32/examples/ResetReason/ResetReason.ino
@@ -16,6 +16,8 @@
 #include "esp32/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/rtc.h"
+#elif CONFIG_IDF_TARGET_ESP32C2
+#include "esp32c2/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32C3
 #include "esp32c3/rom/rtc.h"
 #elif CONFIG_IDF_TARGET_ESP32S3
diff --git a/libraries/SPI/src/SPI.cpp b/libraries/SPI/src/SPI.cpp
index dbea4f8e6e3..64607184e2c 100644
--- a/libraries/SPI/src/SPI.cpp
+++ b/libraries/SPI/src/SPI.cpp
@@ -90,7 +90,7 @@ void SPIClass::begin(int8_t sck, int8_t miso, int8_t mosi, int8_t ss)
         _miso = (_spi_num == FSPI) ? MISO : -1;
         _mosi = (_spi_num == FSPI) ? MOSI : -1;
         _ss = (_spi_num == FSPI) ? SS : -1;
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
+#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
         _sck = SCK;
         _miso = MISO;
         _mosi = MOSI;
diff --git a/libraries/Wire/src/Wire.cpp b/libraries/Wire/src/Wire.cpp
index 2568e3c9413..15c70ed4ff5 100644
--- a/libraries/Wire/src/Wire.cpp
+++ b/libraries/Wire/src/Wire.cpp
@@ -53,9 +53,11 @@ TwoWire::TwoWire(uint8_t bus_num)
     ,nonStopTask(NULL)
     ,lock(NULL)
 #endif
+#if SOC_I2C_SUPPORT_SLAVE
     ,is_slave(false)
     ,user_onRequest(NULL)
     ,user_onReceive(NULL)
+#endif
 {}
 
 TwoWire::~TwoWire()
@@ -338,10 +340,12 @@ bool TwoWire::end()
         }
 #endif
         if(is_slave){
+#if SOC_I2C_SUPPORT_SLAVE
             err = i2cSlaveDeinit(num);
             if(err == ESP_OK){
                 is_slave = false;
             }
+#endif
         } else if(i2cIsInit(num)){
             err = i2cDeinit(num);
         }
@@ -704,4 +708,4 @@ void TwoWire::onRequest( void (*function)(void) )
 TwoWire Wire = TwoWire(0);
 TwoWire Wire1 = TwoWire(1);
 
-#endif /* SOC_I2C_SUPPORTED */
+#endif /* SOC_I2C_SUPPORTED */
\ No newline at end of file
diff --git a/platform.txt b/platform.txt
index d78875bd2ea..eda33165826 100644
--- a/platform.txt
+++ b/platform.txt
@@ -80,6 +80,7 @@ compiler.libraries.ldflags=
 build.extra_flags.esp32=-DARDUINO_USB_CDC_ON_BOOT=0
 build.extra_flags.esp32s3=-DARDUINO_USB_MODE={build.usb_mode} -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot}
 build.extra_flags.esp32s2=-DARDUINO_USB_MODE=0 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot}
+build.extra_flags.esp32c2=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
 build.extra_flags.esp32c3=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
 build.extra_flags.esp32c6=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
 build.extra_flags.esp32h2=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
@@ -107,6 +108,7 @@ build.copy_jtag_files=0
 build.openocdscript.esp32=esp32-wrover-kit-3.3v.cfg
 build.openocdscript.esp32s2=esp32s2-kaluga-1.cfg
 build.openocdscript.esp32s3=esp32s3-builtin.cfg
+build.openocdscript.esp32c3=esp32c2-builtin.cfg
 build.openocdscript.esp32c3=esp32c3-builtin.cfg
 build.openocdscript.esp32c6=esp32c6-builtin.cfg
 build.openocdscript.esp32c6=esp32h2-builtin.cfg
diff --git a/variants/esp32c2/pins_arduino.h b/variants/esp32c2/pins_arduino.h
new file mode 100644
index 00000000000..d78c34bf0fe
--- /dev/null
+++ b/variants/esp32c2/pins_arduino.h
@@ -0,0 +1,29 @@
+#ifndef Pins_Arduino_h
+#define Pins_Arduino_h
+
+#include <stdint.h>
+#include "soc/soc_caps.h"
+
+
+static const uint8_t LED_BUILTIN = SOC_GPIO_PIN_COUNT-13;
+#define BUILTIN_LED  LED_BUILTIN // backward compatibility
+#define LED_BUILTIN LED_BUILTIN  // allow testing #ifdef LED_BUILTIN
+
+static const uint8_t TX = 20;
+static const uint8_t RX = 19;
+
+static const uint8_t SDA = 8;
+static const uint8_t SCL = 9;
+
+static const uint8_t SS    = 4;
+static const uint8_t MOSI  = 7;
+static const uint8_t MISO  = 5;
+static const uint8_t SCK   = 6;
+
+static const uint8_t A0 = 1;
+static const uint8_t A1 = 2;
+static const uint8_t A2 = 3;
+static const uint8_t A3 = 4;
+static const uint8_t A4 = 5;
+
+#endif /* Pins_Arduino_h */

From 6908de4b59bada6f863086d73d813f6b8cd175c6 Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Mon, 13 Nov 2023 18:59:39 +0100
Subject: [PATCH 02/15] Fix typo

---
 platform.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform.txt b/platform.txt
index eda33165826..adeb69d0332 100644
--- a/platform.txt
+++ b/platform.txt
@@ -108,7 +108,7 @@ build.copy_jtag_files=0
 build.openocdscript.esp32=esp32-wrover-kit-3.3v.cfg
 build.openocdscript.esp32s2=esp32s2-kaluga-1.cfg
 build.openocdscript.esp32s3=esp32s3-builtin.cfg
-build.openocdscript.esp32c3=esp32c2-builtin.cfg
+build.openocdscript.esp32c2=esp32c2-builtin.cfg
 build.openocdscript.esp32c3=esp32c3-builtin.cfg
 build.openocdscript.esp32c6=esp32c6-builtin.cfg
 build.openocdscript.esp32c6=esp32h2-builtin.cfg

From c43e3e2d6e7c16105f09c9892c7fe59176f0062d Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Mon, 13 Nov 2023 20:14:11 +0100
Subject: [PATCH 03/15] changes from code review

---
 platform.txt | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/platform.txt b/platform.txt
index adeb69d0332..cff3b1f05c3 100644
--- a/platform.txt
+++ b/platform.txt
@@ -80,7 +80,7 @@ compiler.libraries.ldflags=
 build.extra_flags.esp32=-DARDUINO_USB_CDC_ON_BOOT=0
 build.extra_flags.esp32s3=-DARDUINO_USB_MODE={build.usb_mode} -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot}
 build.extra_flags.esp32s2=-DARDUINO_USB_MODE=0 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot}
-build.extra_flags.esp32c2=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
+build.extra_flags.esp32c2=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT=0
 build.extra_flags.esp32c3=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
 build.extra_flags.esp32c6=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
 build.extra_flags.esp32h2=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
@@ -108,7 +108,6 @@ build.copy_jtag_files=0
 build.openocdscript.esp32=esp32-wrover-kit-3.3v.cfg
 build.openocdscript.esp32s2=esp32s2-kaluga-1.cfg
 build.openocdscript.esp32s3=esp32s3-builtin.cfg
-build.openocdscript.esp32c2=esp32c2-builtin.cfg
 build.openocdscript.esp32c3=esp32c3-builtin.cfg
 build.openocdscript.esp32c6=esp32c6-builtin.cfg
 build.openocdscript.esp32c6=esp32h2-builtin.cfg

From 089d2c7c79b765c282caff00a738e1efb487d894 Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Mon, 13 Nov 2023 20:41:56 +0100
Subject: [PATCH 04/15] rm hack needed to compile for c2

---
 libraries/Wire/src/Wire.cpp | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/libraries/Wire/src/Wire.cpp b/libraries/Wire/src/Wire.cpp
index 15c70ed4ff5..2568e3c9413 100644
--- a/libraries/Wire/src/Wire.cpp
+++ b/libraries/Wire/src/Wire.cpp
@@ -53,11 +53,9 @@ TwoWire::TwoWire(uint8_t bus_num)
     ,nonStopTask(NULL)
     ,lock(NULL)
 #endif
-#if SOC_I2C_SUPPORT_SLAVE
     ,is_slave(false)
     ,user_onRequest(NULL)
     ,user_onReceive(NULL)
-#endif
 {}
 
 TwoWire::~TwoWire()
@@ -340,12 +338,10 @@ bool TwoWire::end()
         }
 #endif
         if(is_slave){
-#if SOC_I2C_SUPPORT_SLAVE
             err = i2cSlaveDeinit(num);
             if(err == ESP_OK){
                 is_slave = false;
             }
-#endif
         } else if(i2cIsInit(num)){
             err = i2cDeinit(num);
         }
@@ -708,4 +704,4 @@ void TwoWire::onRequest( void (*function)(void) )
 TwoWire Wire = TwoWire(0);
 TwoWire Wire1 = TwoWire(1);
 
-#endif /* SOC_I2C_SUPPORTED */
\ No newline at end of file
+#endif /* SOC_I2C_SUPPORTED */

From a052f49e19923899171e498274ad934458ca972a Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Mon, 13 Nov 2023 20:47:15 +0100
Subject: [PATCH 05/15] rm `DARDUINO_USB_MODE=1` not needed for c2

---
 platform.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform.txt b/platform.txt
index cff3b1f05c3..f29af4ec3ca 100644
--- a/platform.txt
+++ b/platform.txt
@@ -80,7 +80,7 @@ compiler.libraries.ldflags=
 build.extra_flags.esp32=-DARDUINO_USB_CDC_ON_BOOT=0
 build.extra_flags.esp32s3=-DARDUINO_USB_MODE={build.usb_mode} -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot}
 build.extra_flags.esp32s2=-DARDUINO_USB_MODE=0 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot}
-build.extra_flags.esp32c2=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT=0
+build.extra_flags.esp32c2=-DARDUINO_USB_CDC_ON_BOOT=0
 build.extra_flags.esp32c3=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
 build.extra_flags.esp32c6=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
 build.extra_flags.esp32h2=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}

From 607547cb96ab853be5d01d624484d35e81aa4b13 Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Mon, 13 Nov 2023 21:02:18 +0100
Subject: [PATCH 06/15] log_e message no RMT support

---
 cores/esp32/esp32-hal-rgb-led.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/cores/esp32/esp32-hal-rgb-led.c b/cores/esp32/esp32-hal-rgb-led.c
index d3fbcff7020..3ed5c53fcac 100644
--- a/cores/esp32/esp32-hal-rgb-led.c
+++ b/cores/esp32/esp32-hal-rgb-led.c
@@ -38,5 +38,6 @@ void neopixelWrite(uint8_t pin, uint8_t red_val, uint8_t green_val, uint8_t blue
   }
   rmtWrite(pin, led_data, RMT_SYMBOLS_OF(led_data), RMT_WAIT_FOR_EVER);
 }
-
-#endif /* SOC_RMT_SUPPORTED */
\ No newline at end of file
+#else
+log_e("No RMT supported");
+#endif /* SOC_RMT_SUPPORTED */

From 6e20defd8e75a556ec59348e55685e3046932976 Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Mon, 13 Nov 2023 21:27:09 +0100
Subject: [PATCH 07/15] correct log_e

---
 cores/esp32/esp32-hal-rgb-led.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/cores/esp32/esp32-hal-rgb-led.c b/cores/esp32/esp32-hal-rgb-led.c
index 3ed5c53fcac..7d177e522a1 100644
--- a/cores/esp32/esp32-hal-rgb-led.c
+++ b/cores/esp32/esp32-hal-rgb-led.c
@@ -1,10 +1,10 @@
 #include "soc/soc_caps.h"
-#if SOC_RMT_SUPPORTED
 
 #include "esp32-hal-rgb-led.h"
 
 
 void neopixelWrite(uint8_t pin, uint8_t red_val, uint8_t green_val, uint8_t blue_val){
+#if SOC_RMT_SUPPORTED
   rmt_data_t led_data[24];
 
   // Verify if the pin used is RGB_BUILTIN and fix GPIO number
@@ -39,5 +39,6 @@ void neopixelWrite(uint8_t pin, uint8_t red_val, uint8_t green_val, uint8_t blue
   rmtWrite(pin, led_data, RMT_SYMBOLS_OF(led_data), RMT_WAIT_FOR_EVER);
 }
 #else
-log_e("No RMT supported");
+    log_e("RMT is not supported on " CONFIG_IDF_TARGET);
 #endif /* SOC_RMT_SUPPORTED */
+}

From b291ba8a9827d3d93e75370cba7e50b716735780 Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Mon, 13 Nov 2023 21:28:44 +0100
Subject: [PATCH 08/15] Update esp32-hal-rgb-led.c

---
 cores/esp32/esp32-hal-rgb-led.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/cores/esp32/esp32-hal-rgb-led.c b/cores/esp32/esp32-hal-rgb-led.c
index 7d177e522a1..5bd98612151 100644
--- a/cores/esp32/esp32-hal-rgb-led.c
+++ b/cores/esp32/esp32-hal-rgb-led.c
@@ -37,7 +37,6 @@ void neopixelWrite(uint8_t pin, uint8_t red_val, uint8_t green_val, uint8_t blue
     }
   }
   rmtWrite(pin, led_data, RMT_SYMBOLS_OF(led_data), RMT_WAIT_FOR_EVER);
-}
 #else
     log_e("RMT is not supported on " CONFIG_IDF_TARGET);
 #endif /* SOC_RMT_SUPPORTED */

From c7937958d364b30cd2ed5cf937b16b023ed5b6e8 Mon Sep 17 00:00:00 2001
From: me-no-dev <hristo@espressif.com>
Date: Mon, 13 Nov 2023 23:22:42 +0200
Subject: [PATCH 09/15] Add component test build for ESP32-C2

---
 .github/workflows/push.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/push.yml b/.github/workflows/push.yml
index 336acfbb5a8..9a0561c92cd 100644
--- a/.github/workflows/push.yml
+++ b/.github/workflows/push.yml
@@ -93,7 +93,7 @@ jobs:
         # https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-guides/tools/idf-docker-image.html
         # for details.
         idf_ver: ["release-v5.1"]
-        idf_target: ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c6", "esp32h2"]
+        idf_target: ["esp32", "esp32s2", "esp32s3", "esp32c2", "esp32c3", "esp32c6", "esp32h2"]
     container: espressif/idf:${{ matrix.idf_ver }}
     steps:
       - name: Check out arduino-esp32 as a component

From 2cf49747a186843d238ffbfacf46b9b0328f0a1f Mon Sep 17 00:00:00 2001
From: me-no-dev <hristo@espressif.com>
Date: Mon, 13 Nov 2023 23:37:15 +0200
Subject: [PATCH 10/15] Disable most components for ESP32-C2

---
 idf_component.yml | 35 ++++++++++++++++++++++++++++-------
 1 file changed, 28 insertions(+), 7 deletions(-)

diff --git a/idf_component.yml b/idf_component.yml
index cbeb0a0f3d9..e7cf53a34d4 100644
--- a/idf_component.yml
+++ b/idf_component.yml
@@ -32,13 +32,34 @@ dependencies:
   chmorgan/esp-libhelix-mp3:
     version: "1.0.3"
     require: public
-  espressif/esp-zboss-lib: "^1.0.1"
-  espressif/esp-zigbee-lib: "^1.0.1"
-  esp-dsp: "^1.3.4"
-  espressif/esp_rainmaker: "^1.0.0"
-  espressif/rmaker_common: "^1.4.3"
-  espressif/esp_insights:  "^1.0.1"
-  espressif/qrcode: "^0.1.0~1"
+  espressif/esp-zboss-lib:
+    version: "^1.0.1"
+    rules:
+      - if: "target != esp32c2"
+  espressif/esp-zigbee-lib:
+    version: "^1.0.1"
+    rules:
+      - if: "target != esp32c2"
+  esp-dsp:
+    version: "^1.3.4"
+    rules:
+      - if: "target != esp32c2"
+  espressif/esp_rainmaker:
+    version: "^1.0.0"
+    rules:
+      - if: "target != esp32c2"
+  espressif/rmaker_common:
+    version: "^1.4.3"
+    rules:
+      - if: "target != esp32c2"
+  espressif/esp_insights:
+    version: "^1.0.1"
+    rules:
+      - if: "target != esp32c2"
+  espressif/qrcode:
+    version: "^0.1.0~1"
+    rules:
+      - if: "target != esp32c2"
   joltwallet/littlefs: "^1.10.2"
   espressif/esp-sr:
     version: "^1.4.2"

From f18c91f3b033bc72396c2f4ce0c436865471e80b Mon Sep 17 00:00:00 2001
From: me-no-dev <hristo@espressif.com>
Date: Mon, 13 Nov 2023 23:51:51 +0200
Subject: [PATCH 11/15] Add missing ADC SOC defines for ESP32-C2

---
 cores/esp32/esp32-hal-adc.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/cores/esp32/esp32-hal-adc.c b/cores/esp32/esp32-hal-adc.c
index 4278b2d1a78..1780e1b8f15 100644
--- a/cores/esp32/esp32-hal-adc.c
+++ b/cores/esp32/esp32-hal-adc.c
@@ -21,6 +21,14 @@
 #include "esp_adc/adc_continuous.h"
 #include "esp_adc/adc_cali_scheme.h"
 
+// ESP32-C2 does not define those two for some reason
+#ifndef SOC_ADC_DIGI_RESULT_BYTES
+#define SOC_ADC_DIGI_RESULT_BYTES               (4)
+#endif
+#ifndef SOC_ADC_DIGI_DATA_BYTES_PER_CONV
+#define SOC_ADC_DIGI_DATA_BYTES_PER_CONV        (4)
+#endif
+
 static uint8_t __analogAttenuation = ADC_11db;
 static uint8_t __analogWidth = SOC_ADC_RTC_MAX_BITWIDTH; 
 static uint8_t __analogReturnedWidth = SOC_ADC_RTC_MAX_BITWIDTH;

From 047e82b75476acbb4f8ecc12062ca49e5caf123d Mon Sep 17 00:00:00 2001
From: me-no-dev <hristo@espressif.com>
Date: Tue, 14 Nov 2023 01:01:48 +0200
Subject: [PATCH 12/15] Add hidden board definition and fix LED pin in variant

---
 boards.txt                      | 115 ++++++++++++++++++++++++++++++++
 variants/esp32c2/pins_arduino.h |   2 +-
 2 files changed, 116 insertions(+), 1 deletion(-)

diff --git a/boards.txt b/boards.txt
index 535ec667ad2..d62bc381e0c 100644
--- a/boards.txt
+++ b/boards.txt
@@ -30,6 +30,121 @@ menu.LORAWAN_PREAMBLE_LENGTH=LoRaWan Preamble Length
 ### DO NOT PUT BOARDS ABOVE THE OFFICIAL ESPRESSIF BOARDS! ###
 ##############################################################
 
+esp32c2.name=ESP32C2 Dev Module
+esp32c2.hide=true
+
+esp32c2.bootloader.tool=esptool_py
+esp32c2.bootloader.tool.default=esptool_py
+
+esp32c2.upload.tool=esptool_py
+esp32c2.upload.tool.default=esptool_py
+esp32c2.upload.tool.network=esp_ota
+
+esp32c2.upload.maximum_size=1310720
+esp32c2.upload.maximum_data_size=327680
+esp32c2.upload.flags=
+esp32c2.upload.extra_flags=
+esp32c2.upload.use_1200bps_touch=false
+esp32c2.upload.wait_for_upload_port=false
+
+esp32c2.serial.disableDTR=false
+esp32c2.serial.disableRTS=false
+
+esp32c2.build.tarch=riscv32
+esp32c2.build.target=esp
+esp32c2.build.mcu=esp32c2
+esp32c2.build.core=esp32
+esp32c2.build.variant=esp32c2
+esp32c2.build.board=ESP32C2_DEV
+esp32c2.build.bootloader_addr=0x0
+
+esp32c2.build.cdc_on_boot=0
+esp32c2.build.f_cpu=120000000L
+esp32c2.build.flash_size=2MB
+esp32c2.build.flash_freq=60m
+esp32c2.build.flash_mode=qio
+esp32c2.build.boot=qio
+esp32c2.build.partitions=minimal
+esp32c2.build.defines=
+
+esp32c2.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
+esp32c2.menu.PartitionScheme.minimal.build.partitions=minimal
+esp32c2.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)
+esp32c2.menu.PartitionScheme.default.build.partitions=default
+esp32c2.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS)
+esp32c2.menu.PartitionScheme.defaultffat.build.partitions=default_ffat
+esp32c2.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
+esp32c2.menu.PartitionScheme.no_ota.build.partitions=no_ota
+esp32c2.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
+esp32c2.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
+esp32c2.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
+esp32c2.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
+esp32c2.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS)
+esp32c2.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat
+esp32c2.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152
+esp32c2.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS)
+esp32c2.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat
+esp32c2.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576
+esp32c2.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
+esp32c2.menu.PartitionScheme.huge_app.build.partitions=huge_app
+esp32c2.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
+esp32c2.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
+esp32c2.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
+esp32c2.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
+
+esp32c2.menu.FlashMode.qio=QIO
+esp32c2.menu.FlashMode.qio.build.flash_mode=dio
+esp32c2.menu.FlashMode.qio.build.boot=qio
+esp32c2.menu.FlashMode.dio=DIO
+esp32c2.menu.FlashMode.dio.build.flash_mode=dio
+esp32c2.menu.FlashMode.dio.build.boot=dio
+
+esp32c2.menu.FlashFreq.60=60MHz
+esp32c2.menu.FlashFreq.60.build.flash_freq=60m
+esp32c2.menu.FlashFreq.30=30MHz
+esp32c2.menu.FlashFreq.30.build.flash_freq=30m
+
+esp32c2.menu.FlashSize.2M=2MB (16Mb)
+esp32c2.menu.FlashSize.2M.build.flash_size=2MB
+esp32c2.menu.FlashSize.2M.build.partitions=minimal
+esp32c2.menu.FlashSize.4M=4MB (32Mb)
+esp32c2.menu.FlashSize.4M.build.flash_size=4MB
+
+esp32c2.menu.UploadSpeed.921600=921600
+esp32c2.menu.UploadSpeed.921600.upload.speed=921600
+esp32c2.menu.UploadSpeed.115200=115200
+esp32c2.menu.UploadSpeed.115200.upload.speed=115200
+esp32c2.menu.UploadSpeed.256000.windows=256000
+esp32c2.menu.UploadSpeed.256000.upload.speed=256000
+esp32c2.menu.UploadSpeed.230400.windows.upload.speed=256000
+esp32c2.menu.UploadSpeed.230400=230400
+esp32c2.menu.UploadSpeed.230400.upload.speed=230400
+esp32c2.menu.UploadSpeed.460800.linux=460800
+esp32c2.menu.UploadSpeed.460800.macosx=460800
+esp32c2.menu.UploadSpeed.460800.upload.speed=460800
+esp32c2.menu.UploadSpeed.512000.windows=512000
+esp32c2.menu.UploadSpeed.512000.upload.speed=512000
+
+esp32c2.menu.DebugLevel.none=None
+esp32c2.menu.DebugLevel.none.build.code_debug=0
+esp32c2.menu.DebugLevel.error=Error
+esp32c2.menu.DebugLevel.error.build.code_debug=1
+esp32c2.menu.DebugLevel.warn=Warn
+esp32c2.menu.DebugLevel.warn.build.code_debug=2
+esp32c2.menu.DebugLevel.info=Info
+esp32c2.menu.DebugLevel.info.build.code_debug=3
+esp32c2.menu.DebugLevel.debug=Debug
+esp32c2.menu.DebugLevel.debug.build.code_debug=4
+esp32c2.menu.DebugLevel.verbose=Verbose
+esp32c2.menu.DebugLevel.verbose.build.code_debug=5
+
+esp32c2.menu.EraseFlash.none=Disabled
+esp32c2.menu.EraseFlash.none.upload.erase_cmd=
+esp32c2.menu.EraseFlash.all=Enabled
+esp32c2.menu.EraseFlash.all.upload.erase_cmd=-e
+
+##############################################################
+
 esp32h2.name=ESP32H2 Dev Module
 esp32h2.vid.0=0x303a
 esp32h2.pid.0=0x1001
diff --git a/variants/esp32c2/pins_arduino.h b/variants/esp32c2/pins_arduino.h
index d78c34bf0fe..1af2b4771bc 100644
--- a/variants/esp32c2/pins_arduino.h
+++ b/variants/esp32c2/pins_arduino.h
@@ -5,7 +5,7 @@
 #include "soc/soc_caps.h"
 
 
-static const uint8_t LED_BUILTIN = SOC_GPIO_PIN_COUNT-13;
+static const uint8_t LED_BUILTIN = SOC_GPIO_PIN_COUNT+13;
 #define BUILTIN_LED  LED_BUILTIN // backward compatibility
 #define LED_BUILTIN LED_BUILTIN  // allow testing #ifdef LED_BUILTIN
 

From 6a0ec68fc189bd67d1da232bfd75cf9d7e1f37f1 Mon Sep 17 00:00:00 2001
From: me-no-dev <hristo@espressif.com>
Date: Tue, 14 Nov 2023 11:07:04 +0200
Subject: [PATCH 13/15] Add default empty zigbee libs and mode

---
 platform.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/platform.txt b/platform.txt
index f29af4ec3ca..b712f49b437 100644
--- a/platform.txt
+++ b/platform.txt
@@ -86,6 +86,8 @@ build.extra_flags.esp32c6=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.
 build.extra_flags.esp32h2=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot}
 
 # This can be overriden in boards.txt
+build.zigbee_mode=
+build.zigbee_libs=
 build.flash_size=4MB
 build.flash_mode=dio
 build.flash_freq=80m

From 1acbec20d7cb1d2750839e1f3662c78f073d367d Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Mon, 20 Nov 2023 22:06:03 +0100
Subject: [PATCH 14/15] Change SPI default pins

---
 variants/esp32c2/pins_arduino.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/variants/esp32c2/pins_arduino.h b/variants/esp32c2/pins_arduino.h
index 1af2b4771bc..65978984e92 100644
--- a/variants/esp32c2/pins_arduino.h
+++ b/variants/esp32c2/pins_arduino.h
@@ -15,10 +15,10 @@ static const uint8_t RX = 19;
 static const uint8_t SDA = 8;
 static const uint8_t SCL = 9;
 
-static const uint8_t SS    = 4;
-static const uint8_t MOSI  = 7;
+static const uint8_t SS    = 7;
+static const uint8_t MOSI  = 6;
 static const uint8_t MISO  = 5;
-static const uint8_t SCK   = 6;
+static const uint8_t SCK   = 4;
 
 static const uint8_t A0 = 1;
 static const uint8_t A1 = 2;

From 8cc5a6e75e5843650b5ed77a817ec0d4d81de894 Mon Sep 17 00:00:00 2001
From: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Date: Tue, 21 Nov 2023 13:52:41 +0100
Subject: [PATCH 15/15] change rx1 tx1 default gpio

---
 cores/esp32/HardwareSerial.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/cores/esp32/HardwareSerial.h b/cores/esp32/HardwareSerial.h
index fe261b38ea0..688655f4f21 100644
--- a/cores/esp32/HardwareSerial.h
+++ b/cores/esp32/HardwareSerial.h
@@ -154,7 +154,7 @@ typedef enum {
     #elif CONFIG_IDF_TARGET_ESP32S2
       #define RX1 (gpio_num_t)4
     #elif CONFIG_IDF_TARGET_ESP32C2
-      #define RX1 (gpio_num_t)9
+      #define RX1 (gpio_num_t)10
     #elif CONFIG_IDF_TARGET_ESP32C3
       #define RX1 (gpio_num_t)18
     #elif CONFIG_IDF_TARGET_ESP32S3
@@ -172,7 +172,7 @@ typedef enum {
     #elif CONFIG_IDF_TARGET_ESP32S2
       #define TX1 (gpio_num_t)5
     #elif CONFIG_IDF_TARGET_ESP32C2
-      #define TX1 (gpio_num_t)10
+      #define TX1 (gpio_num_t)18
     #elif CONFIG_IDF_TARGET_ESP32C3
       #define TX1 (gpio_num_t)19
     #elif CONFIG_IDF_TARGET_ESP32S3