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Bing Guosmb49
Bing Guo
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drm/amd/display: Fix Dynamic bpp issue with 8K30 with Navi 1X
BugLink: https://bugs.launchpad.net/bugs/1944212 [ Upstream commit 06050a0 ] Why: In DCN2x, HW doesn't automatically divide MASTER_UPDATE_LOCK_DB_X by the number of pipes ODM Combined. How: Set MASTER_UPDATE_LOCK_DB_X to the value that is adjusted by the number of pipes ODM Combined. Reviewed-by: Martin Leung <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Bing Guo <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Sasha Levin <[email protected]> Signed-off-by: Kamal Mostafa <[email protected]> Signed-off-by: Kelsey Skunberg <[email protected]>
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drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c

Lines changed: 1 addition & 1 deletion
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@@ -362,7 +362,7 @@ void optc2_lock_doublebuffer_enable(struct timing_generator *optc)
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REG_UPDATE_2(OTG_GLOBAL_CONTROL1,
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MASTER_UPDATE_LOCK_DB_X,
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h_blank_start - 200 - 1,
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(h_blank_start - 200 - 1) / optc1->opp_count,
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MASTER_UPDATE_LOCK_DB_Y,
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v_blank_start - 1);
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}

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