@@ -5895,6 +5895,150 @@ pub unsafe fn vqdmulhs_laneq_s32<const N: i32>(a: i32, b: int32x4_t) -> i32 {
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vqdmulhs_s32(a, b)
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}
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+ /// Saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtn))]
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+ pub unsafe fn vqmovnh_s16(a: i16) -> i8 {
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+ simd_extract(vqmovn_s16(vdupq_n_s16(a)), 0)
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+ }
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+
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+ /// Saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtn))]
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+ pub unsafe fn vqmovns_s32(a: i32) -> i16 {
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+ simd_extract(vqmovn_s32(vdupq_n_s32(a)), 0)
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+ }
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+
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+ /// Saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtn))]
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+ pub unsafe fn vqmovnd_s64(a: i64) -> i32 {
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+ simd_extract(vqmovn_s64(vdupq_n_s64(a)), 0)
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+ }
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+
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+ /// Saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(uqxtn))]
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+ pub unsafe fn vqmovnh_u16(a: u16) -> u8 {
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+ simd_extract(vqmovn_u16(vdupq_n_u16(a)), 0)
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+ }
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+
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+ /// Saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(uqxtn))]
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+ pub unsafe fn vqmovns_u32(a: u32) -> u16 {
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+ simd_extract(vqmovn_u32(vdupq_n_u32(a)), 0)
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+ }
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+
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+ /// Saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(uqxtn))]
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+ pub unsafe fn vqmovnd_u64(a: u64) -> u32 {
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+ simd_extract(vqmovn_u64(vdupq_n_u64(a)), 0)
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+ }
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+
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+ /// Signed saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtn2))]
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+ pub unsafe fn vqmovn_high_s16(a: int8x8_t, b: int16x8_t) -> int8x16_t {
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+ simd_shuffle16!(a, vqmovn_s16(b), [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15])
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+ }
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+
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+ /// Signed saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtn2))]
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+ pub unsafe fn vqmovn_high_s32(a: int16x4_t, b: int32x4_t) -> int16x8_t {
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+ simd_shuffle8!(a, vqmovn_s32(b), [0, 1, 2, 3, 4, 5, 6, 7])
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+ }
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+
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+ /// Signed saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtn2))]
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+ pub unsafe fn vqmovn_high_s64(a: int32x2_t, b: int64x2_t) -> int32x4_t {
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+ simd_shuffle4!(a, vqmovn_s64(b), [0, 1, 2, 3])
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+ }
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+
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+ /// Signed saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(uqxtn2))]
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+ pub unsafe fn vqmovn_high_u16(a: uint8x8_t, b: uint16x8_t) -> uint8x16_t {
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+ simd_shuffle16!(a, vqmovn_u16(b), [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15])
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+ }
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+
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+ /// Signed saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(uqxtn2))]
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+ pub unsafe fn vqmovn_high_u32(a: uint16x4_t, b: uint32x4_t) -> uint16x8_t {
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+ simd_shuffle8!(a, vqmovn_u32(b), [0, 1, 2, 3, 4, 5, 6, 7])
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+ }
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+
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+ /// Signed saturating extract narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(uqxtn2))]
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+ pub unsafe fn vqmovn_high_u64(a: uint32x2_t, b: uint64x2_t) -> uint32x4_t {
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+ simd_shuffle4!(a, vqmovn_u64(b), [0, 1, 2, 3])
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+ }
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+
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+ /// Signed saturating extract unsigned narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtun))]
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+ pub unsafe fn vqmovunh_s16(a: i16) -> u8 {
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+ simd_extract(vqmovun_s16(vdupq_n_s16(a)), 0)
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+ }
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+
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+ /// Signed saturating extract unsigned narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtun))]
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+ pub unsafe fn vqmovuns_s32(a: i32) -> u16 {
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+ simd_extract(vqmovun_s32(vdupq_n_s32(a)), 0)
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+ }
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+
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+ /// Signed saturating extract unsigned narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtun))]
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+ pub unsafe fn vqmovund_s64(a: i64) -> u32 {
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+ simd_extract(vqmovun_s64(vdupq_n_s64(a)), 0)
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+ }
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+
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+ /// Signed saturating extract unsigned narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtun2))]
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+ pub unsafe fn vqmovun_high_s16(a: uint8x8_t, b: int16x8_t) -> uint8x16_t {
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+ simd_shuffle16!(a, vqmovun_s16(b), [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15])
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+ }
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+
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+ /// Signed saturating extract unsigned narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtun2))]
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+ pub unsafe fn vqmovun_high_s32(a: uint16x4_t, b: int32x4_t) -> uint16x8_t {
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+ simd_shuffle8!(a, vqmovun_s32(b), [0, 1, 2, 3, 4, 5, 6, 7])
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+ }
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+
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+ /// Signed saturating extract unsigned narrow
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(sqxtun2))]
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+ pub unsafe fn vqmovun_high_s64(a: uint32x2_t, b: int64x2_t) -> uint32x4_t {
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+ simd_shuffle4!(a, vqmovun_s64(b), [0, 1, 2, 3])
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+ }
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+
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/// Signed saturating rounding doubling multiply returning high half
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#[inline]
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#[target_feature(enable = "neon")]
@@ -13537,6 +13681,159 @@ mod test {
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assert_eq!(r, e);
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}
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovnh_s16() {
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+ let a: i16 = 1;
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+ let e: i8 = 1;
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+ let r: i8 = transmute(vqmovnh_s16(transmute(a)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovns_s32() {
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+ let a: i32 = 1;
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+ let e: i16 = 1;
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+ let r: i16 = transmute(vqmovns_s32(transmute(a)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovnd_s64() {
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+ let a: i64 = 1;
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+ let e: i32 = 1;
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+ let r: i32 = transmute(vqmovnd_s64(transmute(a)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovnh_u16() {
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+ let a: u16 = 1;
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+ let e: u8 = 1;
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+ let r: u8 = transmute(vqmovnh_u16(transmute(a)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovns_u32() {
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+ let a: u32 = 1;
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+ let e: u16 = 1;
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+ let r: u16 = transmute(vqmovns_u32(transmute(a)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovnd_u64() {
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+ let a: u64 = 1;
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+ let e: u32 = 1;
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+ let r: u32 = transmute(vqmovnd_u64(transmute(a)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovn_high_s16() {
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+ let a: i8x8 = i8x8::new(0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F);
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+ let b: i16x8 = i16x8::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
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+ let e: i8x16 = i8x16::new(0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F);
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+ let r: i8x16 = transmute(vqmovn_high_s16(transmute(a), transmute(b)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovn_high_s32() {
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+ let a: i16x4 = i16x4::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
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+ let b: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
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+ let e: i16x8 = i16x8::new(0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF, 0x7F_FF);
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+ let r: i16x8 = transmute(vqmovn_high_s32(transmute(a), transmute(b)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovn_high_s64() {
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+ let a: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
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+ let b: i64x2 = i64x2::new(0x7F_FF_FF_FF_FF_FF_FF_FF, 0x7F_FF_FF_FF_FF_FF_FF_FF);
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+ let e: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x7F_FF_FF_FF);
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+ let r: i32x4 = transmute(vqmovn_high_s64(transmute(a), transmute(b)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovn_high_u16() {
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+ let a: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
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+ let b: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
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+ let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
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+ let r: u8x16 = transmute(vqmovn_high_u16(transmute(a), transmute(b)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovn_high_u32() {
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+ let a: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
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+ let b: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
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+ let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
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+ let r: u16x8 = transmute(vqmovn_high_u32(transmute(a), transmute(b)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovn_high_u64() {
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+ let a: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
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+ let b: u64x2 = u64x2::new(0xFF_FF_FF_FF_FF_FF_FF_FF, 0xFF_FF_FF_FF_FF_FF_FF_FF);
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+ let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
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+ let r: u32x4 = transmute(vqmovn_high_u64(transmute(a), transmute(b)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovunh_s16() {
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+ let a: i16 = 1;
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+ let e: u8 = 1;
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+ let r: u8 = transmute(vqmovunh_s16(transmute(a)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovuns_s32() {
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+ let a: i32 = 1;
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+ let e: u16 = 1;
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+ let r: u16 = transmute(vqmovuns_s32(transmute(a)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovund_s64() {
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+ let a: i64 = 1;
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+ let e: u32 = 1;
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+ let r: u32 = transmute(vqmovund_s64(transmute(a)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovun_high_s16() {
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+ let a: u8x8 = u8x8::new(0, 0, 0, 0, 0, 0, 0, 0);
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+ let b: i16x8 = i16x8::new(-1, -1, -1, -1, -1, -1, -1, -1);
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+ let e: u8x16 = u8x16::new(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
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+ let r: u8x16 = transmute(vqmovun_high_s16(transmute(a), transmute(b)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovun_high_s32() {
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+ let a: u16x4 = u16x4::new(0, 0, 0, 0);
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+ let b: i32x4 = i32x4::new(-1, -1, -1, -1);
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+ let e: u16x8 = u16x8::new(0, 0, 0, 0, 0, 0, 0, 0);
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+ let r: u16x8 = transmute(vqmovun_high_s32(transmute(a), transmute(b)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vqmovun_high_s64() {
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+ let a: u32x2 = u32x2::new(0, 0);
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+ let b: i64x2 = i64x2::new(-1, -1);
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+ let e: u32x4 = u32x4::new(0, 0, 0, 0);
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+ let r: u32x4 = transmute(vqmovun_high_s64(transmute(a), transmute(b)));
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+ assert_eq!(r, e);
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+ }
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+
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#[simd_test(enable = "neon")]
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unsafe fn test_vqrdmulhh_s16() {
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let a: i16 = 1;
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