diff --git a/svd/R7FA4M1AB.svd b/svd/R7FA4M1AB.svd index 3fffa3672..67a6ba02f 100644 --- a/svd/R7FA4M1AB.svd +++ b/svd/R7FA4M1AB.svd @@ -16080,39 +16080,665 @@ These bits select the peripheral function. For individual pin functions, see the 0x00 0xFD - - 8 + + P100PFS + P100 Pin Function Control Register + 0x040 + 32 + read-write + 0x00000000 + 0xFFFFFFFD + + + Reserved + These bits are read as 000. The write value should be 000. + 29 + 31 + read-write + + + PSEL + Port Function Select +These bits select the peripheral function. For individual pin functions, see the MPC table + 24 + 28 + read-write + + + Reserved + These bits are read as 0000000. The write value should be 0000000. + 17 + 23 + read-write + + + PMR + Port Mode Control + 16 + 16 + read-write + + + 0 + Uses the pin as a general I/O pin. + #0 + + + 1 + Uses the pin as an I/O port for peripheral functions. + #1 + + + + + ASEL + Analog Input enable + 15 + 15 + read-write + + + 0 + Used other than as analog pin + #0 + + + 1 + Used as analog pin + #1 + + + + + ISEL + IRQ input enable + 14 + 14 + read-write + + + 0 + Not used as IRQn input pin + #0 + + + 1 + Used as IRQn input pin + #1 + + + + + EOF + Event on Falling + 13 + 13 + read-write + + + 0 + Do not care + #0 + + + 1 + Detect falling edge + #1 + + + + + EOR + Event on Rising + 12 + 12 + read-write + + + 0 + Do not care + #0 + + + 1 + Detect rising edge + #1 + + + + + Reserved + These bits are read as 000. The write value should be 000. + 11 + 11 + read-write + + + DSCR + Port Drive Capability + 10 + 10 + read-write + + + 0 + Low drive + #0 + + + 1 + Middle drive. + #1 + + + + + Reserved + These bits are read as 000. The write value should be 000. + 7 + 9 + read-write + + + NCODR + N-Channel Open Drain Control + 6 + 6 + read-write + + + 0 + CMOS output + #0 + + + 1 + NMOS open-drain output + #1 + + + + + Reserved + This bit is read as 0. The write value should be 0. + 5 + 5 + read-write + + + PCR + Pull-up Control + 4 + 4 + read-write + + + 0 + Disables an input pull-up. + #0 + + + 1 + Enables an input pull-up. + #1 + + + + + Reserved + This bit is read as 0. The write value should be 0. + 3 + 3 + read-write + + + PDR + Port Direction + 2 + 2 + read-write + + + 0 + Input (Functions as an input pin.) + #0 + + + 1 + Output (Functions as an output pin.) + #1 + + + + + PIDR + Port Input Data + 1 + 1 + read-only + + + 0 + Low input + #0 + + + 1 + High input + #1 + + + + + PODR + Port Output Data + 0 + 0 + read-write + + + 0 + Low output + #0 + + + 1 + High output + #1 + + + + + + + P100PFS_HA + P100 Pin Function Control Register + 0x042 + 16 + read-write + 0x0000 + 0xFFFD + + + ASEL + Analog Input enable + 15 + 15 + read-write + + + 0 + Used other than as analog pin + #0 + + + 1 + Used as analog pin + #1 + + + + + ISEL + IRQ input enable + 14 + 14 + read-write + + + 0 + Not used as IRQn input pin + #0 + + + 1 + Used as IRQn input pin + #1 + + + + + EOF + Event on Falling + 13 + 13 + read-write + + + 0 + Do not care + #0 + + + 1 + Detect falling edge + #1 + + + + + EOR + Event on Rising + 12 + 12 + read-write + + + 0 + Do not care + #0 + + + 1 + Detect rising edge + #1 + + + + + Reserved + These bits are read as 000. The write value should be 000. + 11 + 11 + read-write + + + DSCR + Port Drive Capability + 10 + 10 + read-write + + + 0 + Low drive + #0 + + + 1 + Middle drive. + #1 + + + + + Reserved + These bits are read as 000. The write value should be 000. + 7 + 9 + read-write + + + NCODR + N-Channel Open Drain Control + 6 + 6 + read-write + + + 0 + CMOS output + #0 + + + 1 + NMOS open-drain output + #1 + + + + + Reserved + This bit is read as 0. The write value should be 0. + 5 + 5 + read-write + + + PCR + Pull-up Control + 4 + 4 + read-write + + + 0 + Disables an input pull-up. + #0 + + + 1 + Enables an input pull-up. + #1 + + + + + Reserved + This bit is read as 0. The write value should be 0. + 3 + 3 + read-write + + + PDR + Port Direction + 2 + 2 + read-write + + + 0 + Input (Functions as an input pin.) + #0 + + + 1 + Output (Functions as an output pin.) + #1 + + + + + PIDR + Port Input Data + 1 + 1 + read-only + + + 0 + Low input + #0 + + + 1 + High input + #1 + + + + + PODR + Port Output Data + 0 + 0 + read-write + + + 0 + Low output + #0 + + + 1 + High output + #1 + + + + + + + P100PFS_BY + P100 Pin Function Control Register + 0x043 + 8 + read-write + 0x00 + 0xFD + + + Reserved + These bits are read as 000. The write value should be 000. + 7 + 7 + read-write + + + NCODR + N-Channel Open Drain Control + 6 + 6 + read-write + + + 0 + CMOS output + #0 + + + 1 + NMOS open-drain output + #1 + + + + + Reserved + This bit is read as 0. The write value should be 0. + 5 + 5 + read-write + + + PCR + Pull-up Control + 4 + 4 + read-write + + + 0 + Disables an input pull-up. + #0 + + + 1 + Enables an input pull-up. + #1 + + + + + Reserved + This bit is read as 0. The write value should be 0. + 3 + 3 + read-write + + + PDR + Port Direction + 2 + 2 + read-write + + + 0 + Input (Functions as an input pin.) + #0 + + + 1 + Output (Functions as an output pin.) + #1 + + + + + PIDR + Port Input Data + 1 + 1 + read-only + + + 0 + Low input + #0 + + + 1 + High input + #1 + + + + + PODR + Port Output Data + 0 + 0 + read-write + + + 0 + Low output + #0 + + + 1 + High output + #1 + + + + + + + 7 0x4 - 0-7 + 1-7 P10%sPFS P10%s Pin Function Control Register - 0x040 + 0x044 32 read-write 0x00000000 0xFFFFFFFD - - 8 + + 7 0x4 - 0-7 + 1-7 P10%sPFS_HA P10%s Pin Function Control Register P10%sPFS - 0x042 + 0x046 16 read-write 0x0000 0xFFFD - - 8 + + 7 0x4 - 0-7 + 1-7 P10%sPFS_BY P10%s Pin Function Control Register P10%sPFS - 0x043 + 0x047 8 read-write 0x00 @@ -17403,7 +18029,7 @@ These bits select the peripheral function. For individual pin functions, see the 0x10 0xFD - + 5 0x4 11-15 @@ -17415,7 +18041,7 @@ These bits select the peripheral function. For individual pin functions, see the 0x00000000 0xFFFFFFFD - + 5 0x4 11-15 @@ -17428,7 +18054,7 @@ These bits select the peripheral function. For individual pin functions, see the 0x0000 0xFFFD - + 5 0x4 11-15 @@ -17441,7 +18067,7 @@ These bits select the peripheral function. For individual pin functions, see the 0x00 0xFD - + P200PFS P200 Pin Function Control Register 0x080 @@ -17450,7 +18076,7 @@ These bits select the peripheral function. For individual pin functions, see the 0x00000000 0xFFFFFFFD - + P200PFS_HA P200 Pin Function Control Register P200PFS @@ -17460,7 +18086,7 @@ These bits select the peripheral function. For individual pin functions, see the 0x0000 0xFFFD - + P200PFS_BY P200 Pin Function Control Register P200PFS @@ -17617,7 +18243,7 @@ These bits select the peripheral function. For individual pin functions, see the 1 - High drive + Middle drive #1 @@ -17847,7 +18473,7 @@ These bits select the peripheral function. For individual pin functions, see the 1 - High drive + Middle drive #1 @@ -18931,7 +19557,7 @@ These bits select the peripheral function. For individual pin functions, see the - + P409PFS P409 Pin Function Control Register 0x124 @@ -18940,7 +19566,7 @@ These bits select the peripheral function. For individual pin functions, see the 0x00000000 0xFFFFFFFD - + P409PFS_HA P409 Pin Function Control Register P409PFS @@ -18950,7 +19576,7 @@ These bits select the peripheral function. For individual pin functions, see the 0x0000 0xFFFD - + P409PFS_BY P409 Pin Function Control Register P409PFS @@ -18960,7 +19586,7 @@ These bits select the peripheral function. For individual pin functions, see the 0x00 0xFD - + 6 0x4 10-15 @@ -18972,7 +19598,7 @@ These bits select the peripheral function. For individual pin functions, see the 0x00000000 0xFFFFFFFD - + 6 0x4 10-15 @@ -18985,7 +19611,7 @@ These bits select the peripheral function. For individual pin functions, see the 0x0000 0xFFFD - + 6 0x4 10-15