diff --git a/License/license.txt b/License/license.txt new file mode 100644 index 00000000000..2977d52f60b --- /dev/null +++ b/License/license.txt @@ -0,0 +1,37 @@ +The FreeRTOS kernel is released under the MIT open source license, the text of +which is provided below. + +This license covers the FreeRTOS kernel source files, which are located in the +/FreeRTOS/Source directory of the official FreeRTOS kernel download. It also +covers most of the source files in the demo application projects, which are +located in the /FreeRTOS/Demo directory of the official FreeRTOS download. The +demo projects may also include third party software that is not part of FreeRTOS +and is licensed separately to FreeRTOS. Examples of third party software +includes header files provided by chip or tools vendors, linker scripts, +peripheral drivers, etc. All the software in subdirectories of the /FreeRTOS +directory is either open source or distributed with permission, and is free for +use. For the avoidance of doubt, refer to the comments at the top of each +source file. + + +License text: +------------- + +Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal in +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of +the Software, and to permit persons to whom the Software is furnished to do so, +subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR +COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + diff --git a/portable/GCC/ATMega328P/port.c b/portable/GCC/ATMega328P/port.c new file mode 100644 index 00000000000..1848aa62176 --- /dev/null +++ b/portable/GCC/ATMega328P/port.c @@ -0,0 +1,426 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + +Changes from V2.6.0 + + + AVR port - Replaced the inb() and outb() functions with direct memory + access. This allows the port to be built with the 20050414 build of + WinAVR. +*/ + +#include +#include + +#include "FreeRTOS.h" +#include "task.h" + +/*----------------------------------------------------------- + * Implementation of functions defined in portable.h for the AVR port. + *----------------------------------------------------------*/ + +/* Start tasks with interrupts enables. */ +#define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x80 ) + +/* Hardware constants for timer 1. */ +#define portCLEAR_COUNTER_ON_MATCH ( ( uint8_t ) (1 << WGM12) ) +#define portPRESCALE_64 ( ( uint8_t ) ((1 << CS11) | (1 << CS10)) ) +#define portCLOCK_PRESCALER ( ( uint32_t ) 64 ) +#define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( ( uint8_t ) (1 << OCIE1A) ) + +/*-----------------------------------------------------------*/ + +/* We require the address of the pxCurrentTCB variable, but don't want to know +any details of its type. */ +typedef void TCB_t; +extern volatile TCB_t * volatile pxCurrentTCB; + +/*-----------------------------------------------------------*/ + +/* + * Macro to save all the general purpose registers, the save the stack pointer + * into the TCB. + * + * The first thing we do is save the flags then disable interrupts. This is to + * guard our stack against having a context switch interrupt after we have already + * pushed the registers onto the stack - causing the 32 registers to be on the + * stack twice. + * + * r1 is set to zero as the compiler expects it to be thus, however some + * of the math routines make use of R1. + * + * The interrupts will have been disabled during the call to portSAVE_CONTEXT() + * so we need not worry about reading/writing to the stack pointer. + */ + +#define portSAVE_CONTEXT() \ + asm volatile ( "push r0 \n\t" \ + "in r0, __SREG__ \n\t" \ + "cli \n\t" \ + "push r0 \n\t" \ + "push r1 \n\t" \ + "clr r1 \n\t" \ + "push r2 \n\t" \ + "push r3 \n\t" \ + "push r4 \n\t" \ + "push r5 \n\t" \ + "push r6 \n\t" \ + "push r7 \n\t" \ + "push r8 \n\t" \ + "push r9 \n\t" \ + "push r10 \n\t" \ + "push r11 \n\t" \ + "push r12 \n\t" \ + "push r13 \n\t" \ + "push r14 \n\t" \ + "push r15 \n\t" \ + "push r16 \n\t" \ + "push r17 \n\t" \ + "push r18 \n\t" \ + "push r19 \n\t" \ + "push r20 \n\t" \ + "push r21 \n\t" \ + "push r22 \n\t" \ + "push r23 \n\t" \ + "push r24 \n\t" \ + "push r25 \n\t" \ + "push r26 \n\t" \ + "push r27 \n\t" \ + "push r28 \n\t" \ + "push r29 \n\t" \ + "push r30 \n\t" \ + "push r31 \n\t" \ + "lds r26, pxCurrentTCB \n\t" \ + "lds r27, pxCurrentTCB + 1 \n\t" \ + "in r0, 0x3d \n\t" \ + "st x+, r0 \n\t" \ + "in r0, 0x3e \n\t" \ + "st x+, r0 \n\t" \ + ); + +/* + * Opposite to portSAVE_CONTEXT(). Interrupts will have been disabled during + * the context save so we can write to the stack pointer. + */ + +#define portRESTORE_CONTEXT() \ + asm volatile ( "lds r26, pxCurrentTCB \n\t" \ + "lds r27, pxCurrentTCB + 1 \n\t" \ + "ld r28, x+ \n\t" \ + "out __SP_L__, r28 \n\t" \ + "ld r29, x+ \n\t" \ + "out __SP_H__, r29 \n\t" \ + "pop r31 \n\t" \ + "pop r30 \n\t" \ + "pop r29 \n\t" \ + "pop r28 \n\t" \ + "pop r27 \n\t" \ + "pop r26 \n\t" \ + "pop r25 \n\t" \ + "pop r24 \n\t" \ + "pop r23 \n\t" \ + "pop r22 \n\t" \ + "pop r21 \n\t" \ + "pop r20 \n\t" \ + "pop r19 \n\t" \ + "pop r18 \n\t" \ + "pop r17 \n\t" \ + "pop r16 \n\t" \ + "pop r15 \n\t" \ + "pop r14 \n\t" \ + "pop r13 \n\t" \ + "pop r12 \n\t" \ + "pop r11 \n\t" \ + "pop r10 \n\t" \ + "pop r9 \n\t" \ + "pop r8 \n\t" \ + "pop r7 \n\t" \ + "pop r6 \n\t" \ + "pop r5 \n\t" \ + "pop r4 \n\t" \ + "pop r3 \n\t" \ + "pop r2 \n\t" \ + "pop r1 \n\t" \ + "pop r0 \n\t" \ + "out __SREG__, r0 \n\t" \ + "pop r0 \n\t" \ + ); + +/*-----------------------------------------------------------*/ + +/* + * Perform hardware setup to enable ticks from timer 1, compare match A. + */ +static void prvSetupTimerInterrupt( void ); +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) +{ +uint16_t usAddress; + + /* Place a few bytes of known values on the bottom of the stack. + This is just useful for debugging. */ + + *pxTopOfStack = 0x11; + pxTopOfStack--; + *pxTopOfStack = 0x22; + pxTopOfStack--; + *pxTopOfStack = 0x33; + pxTopOfStack--; + + /* Simulate how the stack would look after a call to vPortYield() generated by + the compiler. */ + + /*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */ + + /* The start of the task code will be popped off the stack last, so place + it on first. */ + usAddress = ( uint16_t ) pxCode; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + pxTopOfStack--; + + usAddress >>= 8; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + pxTopOfStack--; + + /* Next simulate the stack as if after a call to portSAVE_CONTEXT(). + portSAVE_CONTEXT places the flags on the stack immediately after r0 + to ensure the interrupts get disabled as soon as possible, and so ensuring + the stack use is minimal should a context switch interrupt occur. */ + *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */ + pxTopOfStack--; + *pxTopOfStack = portFLAGS_INT_ENABLED; + pxTopOfStack--; + + + /* Now the remaining registers. The compiler expects R1 to be 0. */ + *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02; /* R2 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03; /* R3 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04; /* R4 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05; /* R5 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06; /* R6 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07; /* R7 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08; /* R8 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09; /* R9 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10; /* R10 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11; /* R11 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12; /* R12 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x13; /* R13 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x14; /* R14 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x15; /* R15 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x16; /* R16 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x17; /* R17 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x18; /* R18 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x19; /* R19 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x20; /* R20 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x21; /* R21 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x22; /* R22 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x23; /* R23 */ + pxTopOfStack--; + + /* Place the parameter on the stack in the expected location. */ + usAddress = ( uint16_t ) pvParameters; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + pxTopOfStack--; + + usAddress >>= 8; + *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff ); + pxTopOfStack--; + + *pxTopOfStack = ( StackType_t ) 0x26; /* R26 X */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x27; /* R27 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x28; /* R28 Y */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x29; /* R29 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x30; /* R30 Z */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x031; /* R31 */ + pxTopOfStack--; + + /*lint +e950 +e611 +e923 */ + + return pxTopOfStack; +} +/*-----------------------------------------------------------*/ + +BaseType_t xPortStartScheduler( void ) +{ + /* Setup the hardware to generate the tick. */ + prvSetupTimerInterrupt(); + + /* Restore the context of the first task that is going to run. */ + portRESTORE_CONTEXT(); + + /* Simulate a function call end as generated by the compiler. We will now + jump to the start of the task the context of which we have just restored. */ + asm volatile ( "ret" ); + + /* Should not get here. */ + return pdTRUE; +} +/*-----------------------------------------------------------*/ + +void vPortEndScheduler( void ) +{ + /* It is unlikely that the AVR port will get stopped. If required simply + disable the tick interrupt here. */ +} +/*-----------------------------------------------------------*/ + +/* + * Manual context switch. The first thing we do is save the registers so we + * can use a naked attribute. + */ +void vPortYield( void ) __attribute__ ( ( naked ) ); +void vPortYield( void ) +{ + portSAVE_CONTEXT(); + vTaskSwitchContext(); + portRESTORE_CONTEXT(); + + asm volatile ( "ret" ); +} +/*-----------------------------------------------------------*/ + +/* + * Context switch function used by the tick. This must be identical to + * vPortYield() from the call to vTaskSwitchContext() onwards. The only + * difference from vPortYield() is the tick count is incremented as the + * call comes from the tick ISR. + */ +void vPortYieldFromTick( void ) __attribute__ ( ( naked ) ); +void vPortYieldFromTick( void ) +{ + portSAVE_CONTEXT(); + if( xTaskIncrementTick() != pdFALSE ) + { + vTaskSwitchContext(); + } + portRESTORE_CONTEXT(); + + asm volatile ( "ret" ); +} +/*-----------------------------------------------------------*/ + +/* + * Setup timer 1 compare match A to generate a tick interrupt. + */ +static void prvSetupTimerInterrupt( void ) +{ +uint32_t ulCompareMatch; +uint8_t ucHighByte, ucLowByte; + + /* Using 16bit timer 1 to generate the tick. Correct fuses must be + selected for the configCPU_CLOCK_HZ clock. */ + + ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; + + /* We only have 16 bits so have to scale to get our required tick rate. */ + ulCompareMatch /= portCLOCK_PRESCALER; + + /* Adjust for correct value. */ + ulCompareMatch -= ( uint32_t ) 1; + + /* Setup compare match value for compare match A. Interrupts are disabled + before this is called so we need not worry here. */ + ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); + ulCompareMatch >>= 8; + ucHighByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff ); + OCR1AH = ucHighByte; + OCR1AL = ucLowByte; + + /* Setup clock source and compare match behaviour. */ + ucLowByte = portCLEAR_COUNTER_ON_MATCH | portPRESCALE_64; + TCCR1B = ucLowByte; + + /* Enable the interrupt - this is okay as interrupt are currently globally + disabled. */ + ucLowByte = TIMSK1; + ucLowByte |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE; + TIMSK1 = ucLowByte; +} +/*-----------------------------------------------------------*/ + +#if configUSE_PREEMPTION == 1 + + /* + * Tick ISR for preemptive scheduler. We can use a naked attribute as + * the context is saved at the start of vPortYieldFromTick(). The tick + * count is incremented after the context is saved. + */ + void TIMER1_COMPA_vect( void ) __attribute__ ( ( signal, naked ) ); + void TIMER1_COMPA_vect( void ) + { + vPortYieldFromTick(); + asm volatile ( "reti" ); + } +#else + + /* + * Tick ISR for the cooperative scheduler. All this does is increment the + * tick count. We don't need to switch context, this can only be done by + * manual calls to taskYIELD(); + */ + void TIMER1_COMPA_vect( void ) __attribute__ ( ( signal ) ); + void TIMER1_COMPA_vect( void ) + { + xTaskIncrementTick(); + } +#endif + + + diff --git a/portable/GCC/ATMega328P/portmacro.h b/portable/GCC/ATMega328P/portmacro.h new file mode 100644 index 00000000000..998f24c70e7 --- /dev/null +++ b/portable/GCC/ATMega328P/portmacro.h @@ -0,0 +1,107 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* +Changes from V1.2.3 + + + portCPU_CLOSK_HZ definition changed to 8MHz base 10, previously it + base 16. +*/ + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +#ifdef __cplusplus +extern "C" { +#endif + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT int +#define portSTACK_TYPE uint8_t +#define portBASE_TYPE char + +typedef portSTACK_TYPE StackType_t; +typedef signed char BaseType_t; +typedef unsigned char UBaseType_t; + +#if( configUSE_16_BIT_TICKS == 1 ) + typedef uint16_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffff +#else + typedef uint32_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffffffffUL +#endif +/*-----------------------------------------------------------*/ + +/* Critical section management. */ +#define portENTER_CRITICAL() asm volatile ( "in __tmp_reg__, __SREG__" :: ); \ + asm volatile ( "cli" :: ); \ + asm volatile ( "push __tmp_reg__" :: ) + +#define portEXIT_CRITICAL() asm volatile ( "pop __tmp_reg__" :: ); \ + asm volatile ( "out __SREG__, __tmp_reg__" :: ) + +#define portDISABLE_INTERRUPTS() asm volatile ( "cli" :: ); +#define portENABLE_INTERRUPTS() asm volatile ( "sei" :: ); +/*-----------------------------------------------------------*/ + +/* Architecture specifics. */ +#define portSTACK_GROWTH ( -1 ) +#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) +#define portBYTE_ALIGNMENT 1 +#define portNOP() asm volatile ( "nop" ); +/*-----------------------------------------------------------*/ + +/* Kernel utilities. */ +extern void vPortYield( void ) __attribute__ ( ( naked ) ); +#define portYIELD() vPortYield() +/*-----------------------------------------------------------*/ + +/* Task function macros as described on the FreeRTOS.org WEB site. */ +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) + +#ifdef __cplusplus +} +#endif + +#endif /* PORTMACRO_H */ + diff --git a/portable/ThirdParty/GCC/RISC-V/port.c b/portable/ThirdParty/GCC/RISC-V/port.c new file mode 100644 index 00000000000..3cbb2204d1a --- /dev/null +++ b/portable/ThirdParty/GCC/RISC-V/port.c @@ -0,0 +1,385 @@ +/* + FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + This file is part of the FreeRTOS distribution and was contributed + to the project by Technolution B.V. (www.technolution.nl, + freertos-riscv@technolution.eu) under the terms of the FreeRTOS + contributors license. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. + + *************************************************************************** + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + *************************************************************************** + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available on the following + link: http://www.freertos.org/a00114.html + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that is more than just the market leader, it * + * is the industry's de facto standard. * + * * + * Help yourself get started quickly while simultaneously helping * + * to support the FreeRTOS project by purchasing a FreeRTOS * + * tutorial book, reference manual, or both: * + * http://www.FreeRTOS.org/Documentation * + * * + *************************************************************************** + + http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading + the FAQ page "My application does not run, what could be wrong?". Have you + defined configASSERT()? + + http://www.FreeRTOS.org/support - In return for receiving this top quality + embedded software for free we request you assist our global community by + participating in the support forum. + + http://www.FreeRTOS.org/training - Investing in training allows your team to + be as productive as possible as early as possible. Now you can receive + FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers + Ltd, and the world's leading authority on the world's leading RTOS. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. + Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. + + http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High + Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and commercial middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + +/*----------------------------------------------------------- + * Implementation of functions defined in portable.h for the RISC-V port. + *----------------------------------------------------------*/ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "portmacro.h" + +#include "riscv_hal.h" + +#ifdef __riscv64 +# define STORE sd +# define LOAD ld +# define REGBYTES 8 +#else +# define STORE sw +# define LOAD lw +# define REGBYTES 4 +#endif +/* A variable is used to keep track of the critical section nesting. This +variable has to be stored as part of the task context and must be initialized to +a non zero value to ensure interrupts don't inadvertently become unmasked before +the scheduler starts. As it is stored as part of the task context it will +automatically be set to 0 when the first task is started. */ +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; + +/* Contains context when starting scheduler, save all 31 registers */ +#ifdef __gracefulExit +BaseType_t xStartContext[31] = {0}; +#endif + + +typedef struct +{ + uint32_t val_low; + uint32_t val_high; +}riscv_machine_timer_t; + +static volatile riscv_machine_timer_t *mtime = (riscv_machine_timer_t *)0x4400BFF8; + +static volatile riscv_machine_timer_t *mtimecmp = (riscv_machine_timer_t *)0x44004000; + +/* + * Setup the timer to generate the tick interrupts. + */ +void vPortSetupTimer( void ); + +/* + * Set the next interval for the timer + */ +static void prvSetNextTimerInterrupt( void ); + +/* + * Used to catch tasks that attempt to return from their implementing function. + */ +static void prvTaskExitError( void ); + +void vPortEnterCritical( void ) +{ + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; +} +/*-----------------------------------------------------------*/ + +void vPortExitCritical( void ) +{ + uxCriticalNesting--; + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } +} +/*-----------------------------------------------------------*/ + +/* Sets the next timer interrupt + * Reads previous timer compare register, and adds tickrate */ +static void prvSetNextTimerInterrupt(void) +{ + uint64_t time; + + time = mtime->val_low; + time |= ((uint64_t)mtime->val_high << 32); + + time += (configCPU_CLOCK_HZ / configTICK_RATE_HZ); + + mtimecmp->val_low = (uint32_t)(time & 0xFFFFFFFF); + mtimecmp->val_high = (uint32_t)((time >> 32) & 0xFFFFFFFF); + + /* Enable timer interrupt */ + __asm volatile("csrs mie,%0"::"r"(0x80)); +} +/*-----------------------------------------------------------*/ + +/* Sets and enable the timer interrupt */ +void vPortSetupTimer(void) +{ + uint64_t time; + + time = mtime->val_low; + time |= ((uint64_t)mtime->val_high << 32); + + time += (configCPU_CLOCK_HZ / configTICK_RATE_HZ); + + mtimecmp->val_low = (uint32_t)(time & 0xFFFFFFFF); + mtimecmp->val_high = (uint32_t)((time >> 32) & 0xFFFFFFFF); + + + /* Enable timer interrupt */ + __asm volatile("csrs mie,%0"::"r"(0x80)); +} +/*-----------------------------------------------------------*/ + +void prvTaskExitError( void ) +{ + /* A function that implements a task must not exit or attempt to return to + its caller as there is nothing to return to. If a task wants to exit it + should instead call vTaskDelete( NULL ). + + Artificially force an assert() to be triggered if configASSERT() is + defined, then stop here so application writers can catch the error. */ + configASSERT( uxCriticalNesting == ~0UL ); + portDISABLE_INTERRUPTS(); + for( ;; ); +} +/*-----------------------------------------------------------*/ + +/* Clear current interrupt mask and set given mask */ +void vPortClearInterruptMask(int mask) +{ + __asm volatile("csrw mie, %0"::"r"(mask)); +} +/*-----------------------------------------------------------*/ + +/* Set interrupt mask and return current interrupt enable register */ +int vPortSetInterruptMask(void) +{ + int ret; + __asm volatile("csrr %0,mie":"=r"(ret)); + __asm volatile("csrc mie,%0"::"i"(7)); + return ret; +} + +/* + * See header file for description. + */ +StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) +{ + /* Simulate the stack frame as it would be created by a context switch + interrupt. */ + register int *tp asm("x3"); + pxTopOfStack--; + *pxTopOfStack = (portSTACK_TYPE)pxCode; /* Start address */ + pxTopOfStack -= 22; + *pxTopOfStack = (portSTACK_TYPE)pvParameters; /* Register a0 */ + pxTopOfStack -= 6; + *pxTopOfStack = (portSTACK_TYPE)tp; /* Register thread pointer */ + pxTopOfStack -= 3; + *pxTopOfStack = (portSTACK_TYPE)prvTaskExitError; /* Register ra */ + + return pxTopOfStack; +} +/*-----------------------------------------------------------*/ + +void vPortSysTickHandler( void ) +{ + /*Save Context*/ + { + __asm volatile("lw t0, pxCurrentTCB"); + __asm volatile("sw a2, 0x0(t0)"); + } + + /* Increment the RTOS tick. */ + prvSetNextTimerInterrupt(); + + /*Switch task */ + if( xTaskIncrementTick() != pdFALSE ) + { + vTaskSwitchContext(); + } + + /*Restore Context*/ + { + __asm volatile("lw sp, pxCurrentTCB"); + __asm volatile("lw sp, 0x0(sp)"); + + __asm volatile("lw t0, 31 * 4(sp)"); + __asm volatile("csrw mepc, t0"); + + __asm volatile("lw x1, 0x0(sp)"); + __asm volatile("lw x4, 3 * 4(sp)"); + __asm volatile("lw x5, 4 * 4(sp)"); + __asm volatile("lw x6, 5 * 4(sp)"); + __asm volatile("lw x7, 6 * 4(sp)"); + __asm volatile("lw x8, 7 * 4(sp)"); + __asm volatile("lw x9, 8 * 4(sp)"); + __asm volatile("lw x10, 9 * 4(sp)"); + __asm volatile("lw x11, 10 * 4(sp)"); + __asm volatile("lw x12, 11 * 4(sp)"); + __asm volatile("lw x13, 12 * 4(sp)"); + __asm volatile("lw x14, 13 * 4(sp)"); + __asm volatile("lw x15, 14 * 4(sp)"); + __asm volatile("lw x16, 15 * 4(sp)"); + __asm volatile("lw x17, 16 * 4(sp)"); + __asm volatile("lw x18, 17 * 4(sp)"); + __asm volatile("lw x19, 18 * 4(sp)"); + __asm volatile("lw x20, 19 * 4(sp)"); + __asm volatile("lw x21, 20 * 4(sp)"); + __asm volatile("lw x22, 21 * 4(sp)"); + __asm volatile("lw x23, 22 * 4(sp)"); + __asm volatile("lw x24, 23 * 4(sp)"); + __asm volatile("lw x25, 24 * 4(sp)"); + __asm volatile("lw x26, 25 * 4(sp)"); + __asm volatile("lw x27, 26 * 4(sp)"); + __asm volatile("lw x28, 27 * 4(sp)"); + __asm volatile("lw x29, 28 * 4(sp)"); + __asm volatile("lw x30, 29 * 4(sp)"); + __asm volatile("lw x31, 30 * 4(sp)"); + + __asm volatile("addi sp, sp, 4 * 32"); + + __asm volatile("mret"); + } +} +uint32_t g_startscheduler = 0; +BaseType_t xPortStartScheduler( void ) +{ + vPortSetupTimer(); + uxCriticalNesting = 0; + g_startscheduler = 1; + __enable_irq(); + + raise_soft_interrupt(); + + /*Should not get here*/ + return pdFALSE; +} + +void Software_IRQHandler(void) +{ + if(1 == g_startscheduler) + { + g_startscheduler = 2; //skip the save n switch context first time when scheduler is starting. + } + else + { + /*Save Context*/ + { + __asm volatile("lw t0, pxCurrentTCB"); + __asm volatile("sw a2, 0x0(t0)"); + } + + vTaskSwitchContext(); + } + + /*Restore Context*/ + { + __asm volatile("lw sp, pxCurrentTCB"); + __asm volatile("lw sp, 0x0(sp)"); + + __asm volatile("lw t0, 31 * 4(sp)"); + __asm volatile("csrw mepc, t0"); + + __asm volatile("lw x1, 0x0(sp)"); + __asm volatile("lw x4, 3 * 4(sp)"); + __asm volatile("lw x5, 4 * 4(sp)"); + __asm volatile("lw x6, 5 * 4(sp)"); + __asm volatile("lw x7, 6 * 4(sp)"); + __asm volatile("lw x8, 7 * 4(sp)"); + __asm volatile("lw x9, 8 * 4(sp)"); + __asm volatile("lw x10, 9 * 4(sp)"); + __asm volatile("lw x11, 10 * 4(sp)"); + __asm volatile("lw x12, 11 * 4(sp)"); + __asm volatile("lw x13, 12 * 4(sp)"); + __asm volatile("lw x14, 13 * 4(sp)"); + __asm volatile("lw x15, 14 * 4(sp)"); + __asm volatile("lw x16, 15 * 4(sp)"); + __asm volatile("lw x17, 16 * 4(sp)"); + __asm volatile("lw x18, 17 * 4(sp)"); + __asm volatile("lw x19, 18 * 4(sp)"); + __asm volatile("lw x20, 19 * 4(sp)"); + __asm volatile("lw x21, 20 * 4(sp)"); + __asm volatile("lw x22, 21 * 4(sp)"); + __asm volatile("lw x23, 22 * 4(sp)"); + __asm volatile("lw x24, 23 * 4(sp)"); + __asm volatile("lw x25, 24 * 4(sp)"); + __asm volatile("lw x26, 25 * 4(sp)"); + __asm volatile("lw x27, 26 * 4(sp)"); + __asm volatile("lw x28, 27 * 4(sp)"); + __asm volatile("lw x29, 28 * 4(sp)"); + __asm volatile("lw x30, 29 * 4(sp)"); + __asm volatile("lw x31, 30 * 4(sp)"); + + __asm volatile("addi sp, sp, 4 * 32"); + + //PRCI->MSIP[0] = 0x00; + + __asm volatile("addi sp, sp, -1*4"); + __asm volatile("sw t0, 0(sp)"); + __asm volatile("li t0, 0x44000000"); // address of PRCI->MSIP[0] + __asm volatile("sw zero,0(t0)"); + __asm volatile("lw t0, 0(sp)"); + __asm volatile("addi sp, sp, 1*4"); + + __asm volatile("mret"); + } +} + +void vPortYield( void ) +{ + raise_soft_interrupt(); +} + diff --git a/portable/ThirdParty/GCC/RISC-V/portasm.S b/portable/ThirdParty/GCC/RISC-V/portasm.S new file mode 100644 index 00000000000..9d8ad26d35e --- /dev/null +++ b/portable/ThirdParty/GCC/RISC-V/portasm.S @@ -0,0 +1,282 @@ +/* + FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + This file is part of the FreeRTOS distribution and was contributed + to the project by Technolution B.V. (www.technolution.nl, + freertos-riscv@technolution.eu) under the terms of the FreeRTOS + contributors license. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. + + *************************************************************************** + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + *************************************************************************** + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available on the following + link: http://www.freertos.org/a00114.html + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that is more than just the market leader, it * + * is the industry''s de facto standard. * + * * + * Help yourself get started quickly while simultaneously helping * + * to support the FreeRTOS project by purchasing a FreeRTOS * + * tutorial book, reference manual, or both: * + * http://www.FreeRTOS.org/Documentation * + * * + *************************************************************************** + + http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading + the FAQ page "My application does not run, what could be wrong?". Have you + defined configASSERT()? + + http://www.FreeRTOS.org/support - In return for receiving this top quality + embedded software for free we request you assist our global community by + participating in the support forum. + + http://www.FreeRTOS.org/training - Investing in training allows your team to + be as productive as possible as early as possible. Now you can receive + FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers + Ltd, and the world's leading authority on the world's leading RTOS. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. + Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. + + http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High + Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and commercial middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + + +#ifdef __riscv64 +# define STORE sd +# define LOAD ld +# define REGBYTES 8 +#else +# define STORE sw +# define LOAD lw +# define REGBYTES 4 +#endif + +#define MSTATUS_PRV1 0x1800 + +.global portSAVE_CONTEXT +.global portRESTORE_CONTEXT + +//.global xPortStartScheduler +.global vPortYield +.global vTaskIncrementTick +.global vPortEndScheduler +.global xExitStack + + +/* Macro for saving task context */ +.macro portSAVE_CONTEXT + .global pxCurrentTCB + /* make room in stack */ + addi sp, sp, -REGBYTES * 32 + + /* Save Context */ + STORE x1, 0x0(sp) + STORE x2, 1 * REGBYTES(sp) + STORE x3, 2 * REGBYTES(sp) + STORE x4, 3 * REGBYTES(sp) + STORE x5, 4 * REGBYTES(sp) + STORE x6, 5 * REGBYTES(sp) + STORE x7, 6 * REGBYTES(sp) + STORE x8, 7 * REGBYTES(sp) + STORE x9, 8 * REGBYTES(sp) + STORE x10, 9 * REGBYTES(sp) + STORE x11, 10 * REGBYTES(sp) + STORE x12, 11 * REGBYTES(sp) + STORE x13, 12 * REGBYTES(sp) + STORE x14, 13 * REGBYTES(sp) + STORE x15, 14 * REGBYTES(sp) + STORE x16, 15 * REGBYTES(sp) + STORE x17, 16 * REGBYTES(sp) + STORE x18, 17 * REGBYTES(sp) + STORE x19, 18 * REGBYTES(sp) + STORE x20, 19 * REGBYTES(sp) + STORE x21, 20 * REGBYTES(sp) + STORE x22, 21 * REGBYTES(sp) + STORE x23, 22 * REGBYTES(sp) + STORE x24, 23 * REGBYTES(sp) + STORE x25, 24 * REGBYTES(sp) + STORE x26, 25 * REGBYTES(sp) + STORE x27, 26 * REGBYTES(sp) + STORE x28, 27 * REGBYTES(sp) + STORE x29, 28 * REGBYTES(sp) + STORE x30, 29 * REGBYTES(sp) + STORE x31, 30 * REGBYTES(sp) + + /* Store current stackpointer in task control block (TCB) */ + LOAD t0, pxCurrentTCB //pointer + STORE sp, 0x0(t0) + .endm + +/* Saves current error program counter (EPC) as task program counter */ +.macro portSAVE_EPC + csrr t0, mepc + STORE t0, 31 * REGBYTES(sp) + .endm + +/* Saves current return adress (RA) as task program counter */ +.macro portSAVE_RA + STORE ra, 31 * REGBYTES(sp) + .endm + +/* Macro for restoring task context */ +.macro portRESTORE_CONTEXT + + .global pxCurrentTCB + /* Load stack pointer from the current TCB */ + LOAD sp, pxCurrentTCB + LOAD sp, 0x0(sp) + + /* Load task program counter */ + LOAD t0, 31 * REGBYTES(sp) + csrw mepc, t0 + + /* Restore registers, + Skip global pointer because that does not change */ + LOAD x1, 0x0(sp) + LOAD x4, 3 * REGBYTES(sp) + LOAD x5, 4 * REGBYTES(sp) + LOAD x6, 5 * REGBYTES(sp) + LOAD x7, 6 * REGBYTES(sp) + LOAD x8, 7 * REGBYTES(sp) + LOAD x9, 8 * REGBYTES(sp) + LOAD x10, 9 * REGBYTES(sp) + LOAD x11, 10 * REGBYTES(sp) + LOAD x12, 11 * REGBYTES(sp) + LOAD x13, 12 * REGBYTES(sp) + LOAD x14, 13 * REGBYTES(sp) + LOAD x15, 14 * REGBYTES(sp) + LOAD x16, 15 * REGBYTES(sp) + LOAD x17, 16 * REGBYTES(sp) + LOAD x18, 17 * REGBYTES(sp) + LOAD x19, 18 * REGBYTES(sp) + LOAD x20, 19 * REGBYTES(sp) + LOAD x21, 20 * REGBYTES(sp) + LOAD x22, 21 * REGBYTES(sp) + LOAD x23, 22 * REGBYTES(sp) + LOAD x24, 23 * REGBYTES(sp) + LOAD x25, 24 * REGBYTES(sp) + LOAD x26, 25 * REGBYTES(sp) + LOAD x27, 26 * REGBYTES(sp) + LOAD x28, 27 * REGBYTES(sp) + LOAD x29, 28 * REGBYTES(sp) + LOAD x30, 29 * REGBYTES(sp) + LOAD x31, 30 * REGBYTES(sp) + + addi sp, sp, REGBYTES * 32 + + /* Enable global interupt */ + csrs mstatus,8 + + ret + .endm + + +/* +xPortStartScheduler: +#ifdef __gracefulExit + + la t0, xStartContext + STORE x1, 0x0(t0) + STORE x2, 1 * REGBYTES(t0) + STORE x3, 2 * REGBYTES(t0) + STORE x4, 3 * REGBYTES(t0) + STORE x5, 4 * REGBYTES(t0) + STORE x6, 5 * REGBYTES(t0) + STORE x7, 6 * REGBYTES(t0) + STORE x8, 7 * REGBYTES(t0) + STORE x9, 8 * REGBYTES(t0) + STORE x10, 9 * REGBYTES(t0) + STORE x11, 10 * REGBYTES(t0) + STORE x12, 11 * REGBYTES(t0) + STORE x13, 12 * REGBYTES(t0) + STORE x14, 13 * REGBYTES(t0) + STORE x15, 14 * REGBYTES(t0) + STORE x16, 15 * REGBYTES(t0) + STORE x17, 16 * REGBYTES(t0) + STORE x18, 17 * REGBYTES(t0) + STORE x19, 18 * REGBYTES(t0) + STORE x20, 19 * REGBYTES(t0) + STORE x21, 20 * REGBYTES(t0) + STORE x22, 21 * REGBYTES(t0) + STORE x23, 22 * REGBYTES(t0) + STORE x24, 23 * REGBYTES(t0) + STORE x25, 24 * REGBYTES(t0) + STORE x26, 25 * REGBYTES(t0) + STORE x27, 26 * REGBYTES(t0) + STORE x28, 27 * REGBYTES(t0) + STORE x29, 28 * REGBYTES(t0) + STORE x30, 29 * REGBYTES(t0) + STORE x31, 30 * REGBYTES(t0) +#endif + jal vPortSetupTimer + portRESTORE_CONTEXT +*/ + +vPortEndScheduler: +#ifdef __gracefulExit + /* Load current context from xStartContext */ + la t0, xStartContext + LOAD x1, 0x0(t0) + LOAD x2, 1 * REGBYTES(t0) + LOAD x3, 2 * REGBYTES(t0) + LOAD x4, 3 * REGBYTES(t0) + LOAD x5, 4 * REGBYTES(t0) + LOAD x6, 5 * REGBYTES(t0) + LOAD x7, 6 * REGBYTES(t0) + LOAD x8, 7 * REGBYTES(t0) + LOAD x9, 8 * REGBYTES(t0) + LOAD x10, 9 * REGBYTES(t0) + LOAD x11, 10 * REGBYTES(t0) + LOAD x12, 11 * REGBYTES(t0) + LOAD x13, 12 * REGBYTES(t0) + LOAD x14, 13 * REGBYTES(t0) + LOAD x15, 14 * REGBYTES(t0) + LOAD x16, 15 * REGBYTES(t0) + LOAD x17, 16 * REGBYTES(t0) + LOAD x18, 17 * REGBYTES(t0) + LOAD x19, 18 * REGBYTES(t0) + LOAD x20, 19 * REGBYTES(t0) + LOAD x21, 20 * REGBYTES(t0) + LOAD x22, 21 * REGBYTES(t0) + LOAD x23, 22 * REGBYTES(t0) + LOAD x24, 23 * REGBYTES(t0) + LOAD x25, 24 * REGBYTES(t0) + LOAD x26, 25 * REGBYTES(t0) + LOAD x27, 26 * REGBYTES(t0) + LOAD x28, 27 * REGBYTES(t0) + LOAD x29, 28 * REGBYTES(t0) + LOAD x30, 39 * REGBYTES(t0) + LOAD x31, 30 * REGBYTES(t0) +#endif + ret + diff --git a/portable/ThirdParty/GCC/RISC-V/portmacro.h b/portable/ThirdParty/GCC/RISC-V/portmacro.h new file mode 100644 index 00000000000..99c4695c470 --- /dev/null +++ b/portable/ThirdParty/GCC/RISC-V/portmacro.h @@ -0,0 +1,169 @@ +/* + FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd. + All rights reserved + + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + + This file is part of the FreeRTOS distribution and was contributed + to the project by Technolution B.V. (www.technolution.nl, + freertos-riscv@technolution.eu) under the terms of the FreeRTOS + contributors license. + + FreeRTOS is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License (version 2) as published by the + Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. + + *************************************************************************** + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< + *************************************************************************** + + FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. Full license text is available on the following + link: http://www.freertos.org/a00114.html + + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that is more than just the market leader, it * + * is the industry's de facto standard. * + * * + * Help yourself get started quickly while simultaneously helping * + * to support the FreeRTOS project by purchasing a FreeRTOS * + * tutorial book, reference manual, or both: * + * http://www.FreeRTOS.org/Documentation * + * * + *************************************************************************** + + http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading + the FAQ page "My application does not run, what could be wrong?". Have you + defined configASSERT()? + + http://www.FreeRTOS.org/support - In return for receiving this top quality + embedded software for free we request you assist our global community by + participating in the support forum. + + http://www.FreeRTOS.org/training - Investing in training allows your team to + be as productive as possible as early as possible. Now you can receive + FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers + Ltd, and the world's leading authority on the world's leading RTOS. + + http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. + Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. + + http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High + Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and commercial middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and + mission critical applications that require provable dependability. + + 1 tab == 4 spaces! +*/ + + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +#ifdef __cplusplus +extern "C" { +#endif + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short +#define portBASE_TYPE long + +#ifdef __riscv64 + #define portSTACK_TYPE uint64_t + #define portPOINTER_SIZE_TYPE uint64_t +#else + #define portSTACK_TYPE uint32_t + #define portPOINTER_SIZE_TYPE uint32_t +#endif + +typedef portSTACK_TYPE StackType_t; +typedef long BaseType_t; +typedef unsigned long UBaseType_t; + +#if( configUSE_16_BIT_TICKS == 1 ) + typedef uint16_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffff +#else + typedef uint32_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffffffffUL +#endif +/*-----------------------------------------------------------*/ + +/* Architecture specifics. */ +#define portSTACK_GROWTH ( -1 ) +#define portTICK_PERIOD_MS ( ( TickType_t ) (1000 / configTICK_RATE_HZ) ) +#ifdef __riscv64 + #define portBYTE_ALIGNMENT 8 +#else + #define portBYTE_ALIGNMENT 4 +#endif +#define portCRITICAL_NESTING_IN_TCB 1 +/*-----------------------------------------------------------*/ + + +/* Scheduler utilities. */ +extern void vPortYield( void ); +#define portYIELD() vPortYield() +/*-----------------------------------------------------------*/ + + +/* Critical section management. */ +extern int vPortSetInterruptMask( void ); +extern void vPortClearInterruptMask( int ); + +extern void vPortEnterCritical( void ); +extern void vPortExitCritical( void ); + +#define portDISABLE_INTERRUPTS() __asm volatile ( "csrc mstatus,8" ) +#define portENABLE_INTERRUPTS() __asm volatile ( "csrs mstatus,8" ) + +#define portENTER_CRITICAL() vPortEnterCritical() +#define portEXIT_CRITICAL() vPortExitCritical() + +#define portSET_INTERRUPT_MASK_FROM_ISR() vPortSetInterruptMask() + +#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) vPortClearInterruptMask( uxSavedStatusValue ) + +#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield() +/*-----------------------------------------------------------*/ + +/* Task function macros as described on the FreeRTOS.org WEB site. */ +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) + +#define portNOP() __asm volatile ( " nop " ) + +#ifdef __cplusplus +} +#endif + +#endif /* PORTMACRO_H */ + diff --git a/portable/ThirdParty/GCC/Wiced_CY/port.c b/portable/ThirdParty/GCC/Wiced_CY/port.c new file mode 100644 index 00000000000..b604164c966 --- /dev/null +++ b/portable/ThirdParty/GCC/Wiced_CY/port.c @@ -0,0 +1,324 @@ +/* + * FreeRTOS Kernel V10.2.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* Standard includes. */ +#include + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" + +#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 + /* Check the configuration. */ + #if( configMAX_PRIORITIES > 32 ) + #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice. + #endif +#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ + +#ifndef configSETUP_TICK_INTERRUPT + #error configSETUP_TICK_INTERRUPT() must be defined in FreeRTOSConfig.h to call the function that sets up the tick interrupt. +#endif + +#ifndef configCLEAR_TICK_INTERRUPT + #error configCLEAR_TICK_INTERRUPT must be defined in FreeRTOSConfig.h to clear which ever interrupt was used to generate the tick interrupt. +#endif + +/* A critical section is exited when the critical section nesting count reaches +this value. */ +#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 ) + +/* Tasks are not created with a floating point context, but can be given a +floating point context after they have been created. A variable is stored as +part of the tasks context that holds portNO_FLOATING_POINT_CONTEXT if the task +does not have an FPU context, or any other value if the task does have an FPU +context. */ +#define portNO_FLOATING_POINT_CONTEXT ( ( StackType_t ) 0 ) + +/* Constants required to setup the initial task context. */ +#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, IRQ enabled FIQ enabled. */ +#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 ) +#define portTHUMB_MODE_ADDRESS ( 0x01UL ) + +/* Masks all bits in the APSR other than the mode bits. */ +#define portAPSR_MODE_BITS_MASK ( 0x1F ) + +/* The value of the mode bits in the APSR when the CPU is executing in user +mode. */ +#define portAPSR_USER_MODE ( 0x10 ) + +/* Let the user override the pre-loading of the initial LR with the address of +prvTaskExitError() in case it messes up unwinding of the stack in the +debugger. */ +#ifdef configTASK_RETURN_ADDRESS + #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS +#else + #define portTASK_RETURN_ADDRESS prvTaskExitError +#endif + +/*-----------------------------------------------------------*/ + +/* + * Starts the first task executing. This function is necessarily written in + * assembly code so is implemented in portASM.s. + */ +extern void vPortRestoreTaskContext( void ); + +/* + * Used to catch tasks that attempt to return from their implementing function. + */ +static void prvTaskExitError( void ); + +/*-----------------------------------------------------------*/ + +/* A variable is used to keep track of the critical section nesting. This +variable has to be stored as part of the task context and must be initialised to +a non zero value to ensure interrupts don't inadvertently become unmasked before +the scheduler starts. As it is stored as part of the task context it will +automatically be set to 0 when the first task is started. */ +volatile uint32_t ulCriticalNesting = 9999UL; + +/* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then +a floating point context must be saved and restored for the task. */ +volatile uint32_t ulPortTaskHasFPUContext = pdFALSE; + +/* Set to 1 to pend a context switch from an ISR. */ +volatile uint32_t ulPortYieldRequired = pdFALSE; + +/* Counts the interrupt nesting depth. A context switch is only performed if +if the nesting depth is 0. */ +volatile uint32_t ulPortInterruptNesting = 0UL; + +/* Used in the asm file to clear an interrupt. */ +__attribute__(( used )) const uint32_t ulICCEOIR = configEOI_ADDRESS; + +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) +{ + /* Setup the initial stack of the task. The stack is set exactly as + expected by the portRESTORE_CONTEXT() macro. + + The fist real value on the stack is the status register, which is set for + system mode, with interrupts enabled. A few NULLs are added first to ensure + GDB does not try decoding a non-existent return address. */ + *pxTopOfStack = ( StackType_t ) NULL; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) NULL; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) NULL; + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR; + + if( ( ( uint32_t ) pxCode & portTHUMB_MODE_ADDRESS ) != 0x00UL ) + { + /* The task will start in THUMB mode. */ + *pxTopOfStack |= portTHUMB_MODE_BIT; + } + + pxTopOfStack--; + + /* Next the return address, which in this case is the start of the task. */ + *pxTopOfStack = ( StackType_t ) pxCode; + pxTopOfStack--; + + /* Next all the registers other than the stack pointer. */ + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* R14 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ + pxTopOfStack--; + + /* The task will start with a critical nesting count of 0 as interrupts are + enabled. */ + *pxTopOfStack = portNO_CRITICAL_NESTING; + pxTopOfStack--; + + /* The task will start without a floating point context. A task that uses + the floating point hardware must call vPortTaskUsesFPU() before executing + any floating point instructions. */ + *pxTopOfStack = portNO_FLOATING_POINT_CONTEXT; + + return pxTopOfStack; +} +/*-----------------------------------------------------------*/ + +static void prvTaskExitError( void ) +{ + /* A function that implements a task must not exit or attempt to return to + its caller as there is nothing to return to. If a task wants to exit it + should instead call vTaskDelete( NULL ). + + Artificially force an assert() to be triggered if configASSERT() is + defined, then stop here so application writers can catch the error. */ + configASSERT( ulPortInterruptNesting == ~0UL ); + portDISABLE_INTERRUPTS(); + for( ;; ); +} +/*-----------------------------------------------------------*/ + +BaseType_t xPortStartScheduler( void ) +{ +uint32_t ulAPSR; + + /* Only continue if the CPU is not in User mode. The CPU must be in a + Privileged mode for the scheduler to start. */ + __asm volatile ( "MRS %0, APSR" : "=r" ( ulAPSR ) ); + ulAPSR &= portAPSR_MODE_BITS_MASK; + configASSERT( ulAPSR != portAPSR_USER_MODE ); + + if( ulAPSR != portAPSR_USER_MODE ) + { + /* Start the timer that generates the tick ISR. */ + portDISABLE_INTERRUPTS(); + configSETUP_TICK_INTERRUPT(); + + /* Start the first task executing. */ + vPortRestoreTaskContext(); + } + + /* Will only get here if vTaskStartScheduler() was called with the CPU in + a non-privileged mode or the binary point register was not set to its lowest + possible value. prvTaskExitError() is referenced to prevent a compiler + warning about it being defined but not referenced in the case that the user + defines their own exit address. */ + ( void ) prvTaskExitError; + return 0; +} +/*-----------------------------------------------------------*/ + +void vPortEndScheduler( void ) +{ + /* Not implemented in ports where there is nothing to return to. + Artificially force an assert. */ + configASSERT( ulCriticalNesting == 1000UL ); +} +/*-----------------------------------------------------------*/ + +void vPortEnterCritical( void ) +{ + portDISABLE_INTERRUPTS(); + + /* Now interrupts are disabled ulCriticalNesting can be accessed + directly. Increment ulCriticalNesting to keep a count of how many times + portENTER_CRITICAL() has been called. */ + ulCriticalNesting++; + + /* This is not the interrupt safe version of the enter critical function so + assert() if it is being called from an interrupt context. Only API + functions that end in "FromISR" can be used in an interrupt. Only assert if + the critical nesting count is 1 to protect against recursive calls if the + assert function also uses a critical section. */ + if( ulCriticalNesting == 1 ) + { + configASSERT( ulPortInterruptNesting == 0 ); + } +} +/*-----------------------------------------------------------*/ + +void vPortExitCritical( void ) +{ + if( ulCriticalNesting > portNO_CRITICAL_NESTING ) + { + /* Decrement the nesting count as the critical section is being + exited. */ + ulCriticalNesting--; + + /* If the nesting level has reached zero then all interrupt + priorities must be re-enabled. */ + if( ulCriticalNesting == portNO_CRITICAL_NESTING ) + { + /* Critical nesting has reached zero so all interrupt priorities + should be unmasked. */ + portENABLE_INTERRUPTS(); + } + } +} +/*-----------------------------------------------------------*/ + +void FreeRTOS_Tick_Handler( void ) +{ +uint32_t ulInterruptStatus; + + ulInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); + + /* Increment the RTOS tick. */ + if( xTaskIncrementTick() != pdFALSE ) + { + ulPortYieldRequired = pdTRUE; + } + + portCLEAR_INTERRUPT_MASK_FROM_ISR( ulInterruptStatus ); + + configCLEAR_TICK_INTERRUPT(); +} +/*-----------------------------------------------------------*/ + +void vPortTaskUsesFPU( void ) +{ +#if configFPU == 1 +uint32_t ulInitialFPSCR = 0; + + /* A task is registering the fact that it needs an FPU context. Set the + FPU flag (which is saved as part of the task context). */ + ulPortTaskHasFPUContext = pdTRUE; + + /* Initialise the floating point status register. */ + __asm volatile ( "FMXR FPSCR, %0" :: "r" (ulInitialFPSCR) ); +#else + /* If FreeRTOS was built without FPU support but a task is using the FPU, we have a problem */ + configASSERT( 0 ); +#endif +} +/*-----------------------------------------------------------*/ + + diff --git a/portable/ThirdParty/GCC/Wiced_CY/portASM.S b/portable/ThirdParty/GCC/Wiced_CY/portASM.S new file mode 100644 index 00000000000..0aa650cbe3c --- /dev/null +++ b/portable/ThirdParty/GCC/Wiced_CY/portASM.S @@ -0,0 +1,268 @@ +/* + * FreeRTOS Kernel V10.2.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + .text + .arm + + .set SYS_MODE, 0x1f + .set SVC_MODE, 0x13 + .set IRQ_MODE, 0x12 + + /* Variables and functions. */ + .extern ulMaxAPIPriorityMask + .extern _freertos_vector_table + .extern pxCurrentTCB + .extern vTaskSwitchContext + .extern vApplicationIRQHandler + .extern ulPortInterruptNesting + .extern ulPortTaskHasFPUContext + .extern ulICCEOIR + .extern ulPortYieldRequired + + .global FreeRTOS_IRQ_Handler + .global FreeRTOS_SVC_Handler + .global vPortRestoreTaskContext + + +.macro portSAVE_CONTEXT + + /* Save the LR and SPSR onto the system mode stack before switching to + system mode to save the remaining system mode registers. */ + SRSDB sp!, #SYS_MODE + CPS #SYS_MODE + PUSH {R0-R12, R14} + + /* Push the critical nesting count. */ + LDR R2, ulCriticalNestingConst + LDR R1, [R2] + PUSH {R1} + + /* Does the task have a floating point context that needs saving? If + ulPortTaskHasFPUContext is 0 then no. */ + LDR R2, ulPortTaskHasFPUContextConst + LDR R3, [R2] + CMP R3, #0 + +#if configFPU == 1 + /* Save the floating point context, if any. */ + FMRXNE R1, FPSCR + VPUSHNE {D0-D15} +#if configFPU_D32 == 1 + VPUSHNE {D16-D31} +#endif /* configFPU_D32 */ + PUSHNE {R1} +#endif + + /* Save ulPortTaskHasFPUContext itself. */ + PUSH {R3} + + /* Save the stack pointer in the TCB. */ + LDR R0, pxCurrentTCBConst + LDR R1, [R0] + STR SP, [R1] + + .endm + +; /**********************************************************************/ + +.macro portRESTORE_CONTEXT + + /* Set the SP to point to the stack of the task being restored. */ + LDR R0, pxCurrentTCBConst + LDR R1, [R0] + LDR SP, [R1] + + /* Is there a floating point context to restore? If the restored + ulPortTaskHasFPUContext is zero then no. */ + LDR R0, ulPortTaskHasFPUContextConst + POP {R1} + STR R1, [R0] + CMP R1, #0 + +#if configFPU == 1 + /* Restore the floating point context, if any. */ + POPNE {R0} +#if configFPU_D32 == 1 + VPOPNE {D16-D31} +#endif /* configFPU_D32 */ + VPOPNE {D0-D15} + VMSRNE FPSCR, R0 +#endif + + /* Restore the critical section nesting depth. */ + LDR R0, ulCriticalNestingConst + POP {R1} + STR R1, [R0] + + /* Restore all system mode registers other than the SP (which is already + being used). */ + POP {R0-R12, R14} + + /* Return to the task code, loading CPSR on the way. */ + RFEIA sp! + + .endm + + + + +/****************************************************************************** + * SVC handler is used to yield. + *****************************************************************************/ +.align 4 +.type FreeRTOS_SVC_Handler, %function +FreeRTOS_SVC_Handler: + /* Save the context of the current task and select a new task to run. */ + portSAVE_CONTEXT + LDR R0, vTaskSwitchContextConst + BLX R0 + portRESTORE_CONTEXT + + +/****************************************************************************** + * vPortRestoreTaskContext is used to start the scheduler. + *****************************************************************************/ +.align 4 +.type vPortRestoreTaskContext, %function +vPortRestoreTaskContext: + /* Switch to system mode. */ + CPS #SYS_MODE + portRESTORE_CONTEXT + +.align 4 +.type FreeRTOS_IRQ_Handler, %function +FreeRTOS_IRQ_Handler: + /* Return to the interrupted instruction. */ + SUB lr, lr, #4 + + /* Push the return address and SPSR. */ + PUSH {lr} + MRS lr, SPSR + PUSH {lr} + + /* Change to supervisor mode to allow reentry. */ + CPS #0x13 + + /* Push used registers. */ + PUSH {r0-r3, r12} + + /* Increment nesting count. r3 holds the address of ulPortInterruptNesting + for future use. r1 holds the original ulPortInterruptNesting value for + future use. */ + LDR r3, ulPortInterruptNestingConst + LDR r1, [r3] + ADD r0, r1, #1 + STR r0, [r3] + + /* Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for + future use. */ + MOV r0, sp + AND r2, r0, #4 + SUB sp, sp, r2 + + /* Call the interrupt handler. */ + PUSH {r0-r3, lr} + LDR r1, vApplicationIRQHandlerConst + BLX r1 + POP {r0-r3, lr} + ADD sp, sp, r2 + + CPSID i + DSB + ISB + + /* Write to the EOI register. */ + LDR r0, ulICCEOIRConst + LDR r2, [r0] + STR r0, [r2] + + /* Restore the old nesting count. */ + STR r1, [r3] + + /* A context switch is never performed if the nesting count is not 0. */ + CMP r1, #0 + BNE exit_without_switch + + /* Did the interrupt request a context switch? r1 holds the address of + ulPortYieldRequired and r0 the value of ulPortYieldRequired for future + use. */ + LDR r1, ulPortYieldRequiredConst + LDR r0, [r1] + CMP r0, #0 + BNE switch_before_exit + +exit_without_switch: + /* No context switch. Restore used registers, LR_irq and SPSR before + returning. */ + POP {r0-r3, r12} + CPS #IRQ_MODE + POP {LR} + MSR SPSR_cxsf, LR + POP {LR} + MOVS PC, LR + +switch_before_exit: + /* A context swtich is to be performed. Clear the context switch pending + flag. */ + MOV r0, #0 + STR r0, [r1] + + /* Restore used registers, LR-irq and SPSR before saving the context + to the task stack. */ + POP {r0-r3, r12} + CPS #IRQ_MODE + POP {LR} + MSR SPSR_cxsf, LR + POP {LR} + portSAVE_CONTEXT + + /* Call the function that selects the new task to execute. + vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD + instructions, or 8 byte aligned stack allocated data. LR does not need + saving as a new LR will be loaded by portRESTORE_CONTEXT anyway. */ + LDR R0, vTaskSwitchContextConst + BLX R0 + + /* Restore the context of, and branch to, the task selected to execute + next. */ + portRESTORE_CONTEXT + +ulICCEOIRConst: .word ulICCEOIR +pxCurrentTCBConst: .word pxCurrentTCB +ulCriticalNestingConst: .word ulCriticalNesting +ulPortTaskHasFPUContextConst: .word ulPortTaskHasFPUContext +vTaskSwitchContextConst: .word vTaskSwitchContext +vApplicationIRQHandlerConst: .word vApplicationIRQHandler +ulPortInterruptNestingConst: .word ulPortInterruptNesting +ulPortYieldRequiredConst: .word ulPortYieldRequired + +.end + + + + + diff --git a/portable/ThirdParty/GCC/Wiced_CY/portmacro.h b/portable/ThirdParty/GCC/Wiced_CY/portmacro.h new file mode 100644 index 00000000000..8c4aee3ee43 --- /dev/null +++ b/portable/ThirdParty/GCC/Wiced_CY/portmacro.h @@ -0,0 +1,179 @@ +/* + * FreeRTOS Kernel V10.2.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +#ifdef __cplusplus + extern "C" { +#endif + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the given hardware + * and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short +#define portSTACK_TYPE uint32_t +#define portBASE_TYPE long + +typedef portSTACK_TYPE StackType_t; +typedef long BaseType_t; +typedef unsigned long UBaseType_t; + +typedef uint32_t TickType_t; +#define portMAX_DELAY ( TickType_t ) 0xffffffffUL + +/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do +not need to be guarded with a critical section. */ +#define portTICK_TYPE_IS_ATOMIC 1 + +/*-----------------------------------------------------------*/ + +/* Hardware specifics. */ +#define portSTACK_GROWTH ( -1 ) +#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) +#define portBYTE_ALIGNMENT 8 + +/*-----------------------------------------------------------*/ + +/* Task utilities. */ + +/* Called at the end of an ISR that can cause a context switch. */ +#define portEND_SWITCHING_ISR( xSwitchRequired )\ +{ \ +extern volatile uint32_t ulPortYieldRequired; \ + \ + if( xSwitchRequired != pdFALSE ) \ + { \ + ulPortYieldRequired = pdTRUE; \ + } \ +} + +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +#define portYIELD() __asm volatile ( "SWI 0 \n" \ + "ISB " ); + + +/*----------------------------------------------------------- + * Critical section control + *----------------------------------------------------------*/ + +extern void vPortEnterCritical( void ); +extern void vPortExitCritical( void ); +extern uint32_t ulPortSetInterruptMask( void ); +extern void vPortClearInterruptMask( uint32_t ulNewMaskValue ); +extern void vPortInstallFreeRTOSVectorTable( void ); + +/* The I bit within the CPSR. */ +#define portINTERRUPT_ENABLE_BIT ( 1 << 7 ) + +/* In the absence of a priority mask register, these functions and macros +globally enable and disable interrupts. */ +#define portENTER_CRITICAL() vPortEnterCritical(); +#define portEXIT_CRITICAL() vPortExitCritical(); +#define portENABLE_INTERRUPTS() __asm volatile ( "CPSIE i \n" ); +#define portDISABLE_INTERRUPTS() __asm volatile ( "CPSID i \n" \ + "DSB \n" \ + "ISB " ); + +__attribute__( ( always_inline ) ) static __inline uint32_t portINLINE_SET_INTERRUPT_MASK_FROM_ISR( void ) +{ +volatile uint32_t ulCPSR; + + __asm volatile ( "MRS %0, CPSR" : "=r" (ulCPSR) ); + ulCPSR &= portINTERRUPT_ENABLE_BIT; + portDISABLE_INTERRUPTS(); + return ulCPSR; +} + +#define portSET_INTERRUPT_MASK_FROM_ISR() portINLINE_SET_INTERRUPT_MASK_FROM_ISR() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) if( x == 0 ) portENABLE_INTERRUPTS() + +/*-----------------------------------------------------------*/ + +/* Task function macros as described on the FreeRTOS.org WEB site. These are +not required for this port but included in case common demo code that uses these +macros is used. */ +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) + +/* Tickless idle/low power functionality. */ +#ifndef portSUPPRESS_TICKS_AND_SLEEP + extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); + #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) +#endif + +/* Prototype of the FreeRTOS tick handler. This must be installed as the +handler for whichever peripheral is used to generate the RTOS tick. */ +void FreeRTOS_Tick_Handler( void ); + +/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU() +before any floating point instructions are executed. */ +void vPortTaskUsesFPU( void ); +#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU() + +#define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL ) +#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL ) + +/* Architecture specific optimisations. */ +#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION + #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 +#endif + +#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 + + /* Store/clear the ready priorities in a bit map. */ + #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) + #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) + + /*-----------------------------------------------------------*/ + + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) ) + +#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ + +#define portNOP() __asm volatile( "NOP" ) +#define portINLINE __inline + +#ifdef __cplusplus + } /* extern C */ +#endif + + +#endif /* PORTMACRO_H */ + diff --git a/portable/ThirdParty/GCC/nrf52840-dk/port.c b/portable/ThirdParty/GCC/nrf52840-dk/port.c new file mode 100644 index 00000000000..5b5b4f176e1 --- /dev/null +++ b/portable/ThirdParty/GCC/nrf52840-dk/port.c @@ -0,0 +1,148 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/*----------------------------------------------------------- + * Implementation of functions defined in portable.h for the ARM CM4F port. + *----------------------------------------------------------*/ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" + +/* + * Start first task is a separate function so it can be tested in isolation. + */ +void vPortStartFirstTask( void ) __attribute__ (( naked )); + +/* + * Exception handlers. + */ +void vPortSVCHandler( void ) __attribute__ (( naked )); +void xPortPendSVHandler( void ) __attribute__ (( naked )); + + +/*-----------------------------------------------------------*/ + +void vPortStartFirstTask( void ) +{ + __asm volatile( +#if defined(__SES_ARM) + " ldr r0, =_vectors \n" /* Locate the stack using _vectors table. */ +#else + " ldr r0, =__isr_vector \n" /* Locate the stack using __isr_vector table. */ +#endif + " ldr r0, [r0] \n" + " msr msp, r0 \n" /* Set the msp back to the start of the stack. */ + " cpsie i \n" /* Globally enable interrupts. */ + " cpsie f \n" + " dsb \n" + " isb \n" +#ifdef SOFTDEVICE_PRESENT + /* Block kernel interrupts only (PendSV) before calling SVC */ + " mov r0, %0 \n" + " msr basepri, r0 \n" +#endif + " svc 0 \n" /* System call to start first task. */ + " \n" + " .align 2 \n" +#ifdef SOFTDEVICE_PRESENT + ::"i"(configKERNEL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) +#endif + ); +} + +/*-----------------------------------------------------------*/ + +void vPortSVCHandler( void ) +{ + __asm volatile ( + " ldr r3, =pxCurrentTCB \n" /* Restore the context. */ + " ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */ + " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */ + " ldmia r0!, {r4-r11, r14} \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */ + " msr psp, r0 \n" /* Restore the task stack pointer. */ + " isb \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" + " bx r14 \n" + " \n" + " .align 2 \n" + ); +} + +/*-----------------------------------------------------------*/ + +void xPortPendSVHandler( void ) +{ + /* This is a naked function. */ + + __asm volatile + ( + " mrs r0, psp \n" + " isb \n" + " \n" + " ldr r3, =pxCurrentTCB \n" /* Get the location of the current TCB. */ + " ldr r2, [r3] \n" + " \n" + " tst r14, #0x10 \n" /* Is the task using the FPU context? If so, push high vfp registers. */ + " it eq \n" + " vstmdbeq r0!, {s16-s31} \n" + " \n" + " stmdb r0!, {r4-r11, r14} \n" /* Save the core registers. */ + " \n" + " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */ + " \n" + " stmdb sp!, {r3} \n" + " mov r0, %0 \n" + " msr basepri, r0 \n" + " dsb \n" + " isb \n" + " bl vTaskSwitchContext \n" + " mov r0, #0 \n" + " msr basepri, r0 \n" + " ldmia sp!, {r3} \n" + " \n" + " ldr r1, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */ + " ldr r0, [r1] \n" + " \n" + " ldmia r0!, {r4-r11, r14} \n" /* Pop the core registers. */ + " \n" + " tst r14, #0x10 \n" /* Is the task using the FPU context? If so, pop the high vfp registers too. */ + " it eq \n" + " vldmiaeq r0!, {s16-s31} \n" + " \n" + " msr psp, r0 \n" + " isb \n" + " \n" + " \n" + " bx r14 \n" + " \n" + " .align 2 \n" + ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) + ); +} diff --git a/portable/ThirdParty/GCC/nrf52840-dk/port_cmsis.c b/portable/ThirdParty/GCC/nrf52840-dk/port_cmsis.c new file mode 100644 index 00000000000..2fbec43f26a --- /dev/null +++ b/portable/ThirdParty/GCC/nrf52840-dk/port_cmsis.c @@ -0,0 +1,357 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/*----------------------------------------------------------- + * Implementation of functions defined in portable.h for the ARM CM4F port. + *----------------------------------------------------------*/ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" +#ifdef SOFTDEVICE_PRESENT +#include "nrf_soc.h" +#include "app_util.h" +#include "app_util_platform.h" +#endif + +#if !(__FPU_USED) && !(__LINT__) + #error This port can only be used when the project options are configured to enable hardware floating point support. +#endif + +#if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 + #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html +#endif + +/* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7 +r0p1 port. */ +#define portCORTEX_M4_r0p1_ID ( 0x410FC241UL ) + +/* Constants required to check the validity of an interrupt priority. */ +#define portFIRST_USER_INTERRUPT_NUMBER ( 16 ) +#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff ) +#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 ) + +/* Constants required to set up the initial stack. */ +#define portINITIAL_XPSR (((xPSR_Type){.b.T = 1}).w) +#define portINITIAL_EXEC_RETURN ( 0xfffffffd ) + +/* Let the user override the pre-loading of the initial LR with the address of +prvTaskExitError() in case is messes up unwinding of the stack in the +debugger. */ +#ifdef configTASK_RETURN_ADDRESS + #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS +#else + #define portTASK_RETURN_ADDRESS prvTaskExitError +#endif + +/* Each task maintains its own interrupt status in the critical nesting +variable. */ +static UBaseType_t uxCriticalNesting = 0; + +/* + * Setup the timer to generate the tick interrupts. The implementation in this + * file is weak to allow application writers to change the timer used to + * generate the tick interrupt. + */ +extern void vPortSetupTimerInterrupt( void ); + +/* + * Exception handlers. + */ +void xPortSysTickHandler( void ); + +/* + * Start first task is a separate function so it can be tested in isolation. + */ +extern void vPortStartFirstTask( void ); + +/* + * Function to enable the VFP. + */ +static void vPortEnableVFP( void ); + +/* + * Used to catch tasks that attempt to return from their implementing function. + */ +static void prvTaskExitError( void ); + +/*-----------------------------------------------------------*/ + +/* + * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure + * FreeRTOS API functions are not called from interrupts that have been assigned + * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. + */ +#if ( configASSERT_DEFINED == 1 ) + static uint8_t ucMaxSysCallPriority = 0; + static uint32_t ulMaxPRIGROUPValue = 0; +#endif /* configASSERT_DEFINED */ + +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) +{ + /* Simulate the stack frame as it would be created by a context switch + interrupt. */ + + /* Offset added to account for the way the MCU uses the stack on entry/exit + of interrupts, and to ensure alignment. */ + pxTopOfStack--; + + *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxCode; /* PC */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */ + + /* Save code space by skipping register initialisation. */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ + + /* A save method is being used that requires each task to maintain its + own exec return value. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_EXEC_RETURN; + + pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ + + return pxTopOfStack; +} +/*-----------------------------------------------------------*/ + +static void prvTaskExitError( void ) +{ + /* A function that implements a task must not exit or attempt to return to + its caller as there is nothing to return to. If a task wants to exit it + should instead call vTaskDelete( NULL ). + + Artificially force an assert() to be triggered if configASSERT() is + defined, then stop here so application writers can catch the error. */ + configASSERT( uxCriticalNesting == ~0UL ); + portDISABLE_INTERRUPTS(); + for ( ;; ); +} + + +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +BaseType_t xPortStartScheduler( void ) +{ + /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. + See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ + configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY ); + + /* This port is designed for nRF52, this is Cortex-M4 r0p1. */ + configASSERT( SCB->CPUID == portCORTEX_M4_r0p1_ID ); + + #if ( configASSERT_DEFINED == 1 ) + { + volatile uint32_t ulOriginalPriority; + volatile uint8_t * const pucFirstUserPriorityRegister = &NVIC->IP[0]; + volatile uint8_t ucMaxPriorityValue; + + /* Determine the maximum priority from which ISR safe FreeRTOS API + functions can be called. ISR safe functions are those that end in + "FromISR". FreeRTOS maintains separate thread and ISR API functions to + ensure interrupt entry is as fast and simple as possible. + + Save the interrupt priority value that is about to be clobbered. */ + ulOriginalPriority = *pucFirstUserPriorityRegister; + + /* Determine the number of priority bits available. First write to all + possible bits. */ + *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; + + /* Read the value back to see how many bits stuck. */ + ucMaxPriorityValue = *pucFirstUserPriorityRegister; + + /* Use the same mask on the maximum system call priority. */ + ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; + + /* Calculate the maximum acceptable priority group value for the number + of bits read back. */ + ulMaxPRIGROUPValue = SCB_AIRCR_PRIGROUP_Msk >> SCB_AIRCR_PRIGROUP_Pos; + while ( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) + { + ulMaxPRIGROUPValue--; + ucMaxPriorityValue <<= ( uint8_t ) 0x01; + } + + /* Remove any bits that are more than actually existing. */ + ulMaxPRIGROUPValue &= SCB_AIRCR_PRIGROUP_Msk >> SCB_AIRCR_PRIGROUP_Pos; + + /* Restore the clobbered interrupt priority register to its original + value. */ + *pucFirstUserPriorityRegister = ulOriginalPriority; + } + #endif /* conifgASSERT_DEFINED */ + + /* Make PendSV the lowest priority interrupts. */ + NVIC_SetPriority(PendSV_IRQn, configKERNEL_INTERRUPT_PRIORITY); + + /* Start the timer that generates the tick ISR. Interrupts are disabled + here already. */ + vPortSetupTimerInterrupt(); + + /* Initialise the critical nesting count ready for the first task. */ + uxCriticalNesting = 0; + + /* Ensure the VFP is enabled - it should be anyway. */ + vPortEnableVFP(); + + /* Lazy save always. */ + FPU->FPCCR |= FPU_FPCCR_ASPEN_Msk | FPU_FPCCR_LSPEN_Msk; + + /* Finally this port requires SEVONPEND to be active */ + SCB->SCR |= SCB_SCR_SEVONPEND_Msk; + + /* Start the first task. */ + vPortStartFirstTask(); + + /* Should never get here as the tasks will now be executing! Call the task + exit error function to prevent compiler warnings about a static function + not being called in the case that the application writer overrides this + functionality by defining configTASK_RETURN_ADDRESS. */ + prvTaskExitError(); + + /* Should not get here! */ + return 0; +} +/*-----------------------------------------------------------*/ + +void vPortEndScheduler( void ) +{ + /* Not implemented in ports where there is nothing to return to. + Artificially force an assert. */ + configASSERT( uxCriticalNesting == 1000UL ); +} +/*-----------------------------------------------------------*/ + +void vPortEnterCritical( void ) +{ + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + + /* This is not the interrupt safe version of the enter critical function so + assert() if it is being called from an interrupt context. Only API + functions that end in "FromISR" can be used in an interrupt. Only assert if + the critical nesting count is 1 to protect against recursive calls if the + assert function also uses a critical section. */ + if ( uxCriticalNesting == 1 ) + { + configASSERT( ( SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk ) == 0 ); + } +} +/*-----------------------------------------------------------*/ + +void vPortExitCritical( void ) +{ + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + if ( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } +} + +/*-----------------------------------------------------------*/ + +/* This is a naked function. */ +static void vPortEnableVFP( void ) +{ + SCB->CPACR |= 0xf << 20; +} +/*-----------------------------------------------------------*/ + +#if ( configASSERT_DEFINED == 1 ) + + void vPortValidateInterruptPriority( void ) + { + uint32_t ulCurrentInterrupt; + uint8_t ucCurrentPriority; + IPSR_Type ipsr; + + /* Obtain the number of the currently executing interrupt. */ + ipsr.w = __get_IPSR(); + ulCurrentInterrupt = ipsr.b.ISR; + + /* Is the interrupt number a user defined interrupt? */ + if ( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER ) + { + /* Look up the interrupt's priority. */ + ucCurrentPriority = NVIC->IP[ ulCurrentInterrupt - portFIRST_USER_INTERRUPT_NUMBER ]; + + /* The following assertion will fail if a service routine (ISR) for + an interrupt that has been assigned a priority above + configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API + function. ISR safe FreeRTOS API functions must *only* be called + from interrupts that have been assigned a priority at or below + configMAX_SYSCALL_INTERRUPT_PRIORITY. + + Numerically low interrupt priority numbers represent logically high + interrupt priorities, therefore the priority of the interrupt must + be set to a value equal to or numerically *higher* than + configMAX_SYSCALL_INTERRUPT_PRIORITY. + + Interrupts that use the FreeRTOS API must not be left at their + default priority of zero as that is the highest possible priority, + which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY, + and therefore also guaranteed to be invalid. + + FreeRTOS maintains separate thread and ISR API functions to ensure + interrupt entry is as fast and simple as possible. + + The following links provide detailed information: + http://www.freertos.org/RTOS-Cortex-M3-M4.html + http://www.freertos.org/FAQHelp.html */ + configASSERT( ucCurrentPriority >= ucMaxSysCallPriority ); + } + + /* Priority grouping: The interrupt controller (NVIC) allows the bits + that define each interrupt's priority to be split between bits that + define the interrupt's pre-emption priority bits and bits that define + the interrupt's sub-priority. For simplicity all bits must be defined + to be pre-emption priority bits. The following assertion will fail if + this is not the case (if some bits represent a sub-priority). + + If the application only uses CMSIS libraries for interrupt + configuration then the correct setting can be achieved on all Cortex-M + devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the + scheduler. Note however that some vendor specific peripheral libraries + assume a non-zero priority group setting, in which cases using a value + of zero will result in unpredicable behaviour. */ + configASSERT( NVIC_GetPriorityGrouping() <= ulMaxPRIGROUPValue ); + } + +#endif /* configASSERT_DEFINED */ diff --git a/portable/ThirdParty/GCC/nrf52840-dk/port_cmsis_systick.c b/portable/ThirdParty/GCC/nrf52840-dk/port_cmsis_systick.c new file mode 100644 index 00000000000..aa3ba8ced7a --- /dev/null +++ b/portable/ThirdParty/GCC/nrf52840-dk/port_cmsis_systick.c @@ -0,0 +1,299 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "app_util.h" + +#ifdef SOFTDEVICE_PRESENT +#include "nrf_soc.h" +#include "nrf_sdh.h" +#include "app_error.h" +#include "app_util_platform.h" +#endif + +/*----------------------------------------------------------- + * Implementation of functions defined in portable.h for the ARM CM4F port. + * CMSIS compatible layer to menage SysTick ticking source. + *----------------------------------------------------------*/ + +#if configTICK_SOURCE == FREERTOS_USE_SYSTICK + + +#ifndef configSYSTICK_CLOCK_HZ + #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ + /* Ensure the SysTick is clocked at the same frequency as the core. */ + #define portNVIC_SYSTICK_CLK_BIT ( SysTick_CTRL_CLKSOURCE_Msk ) +#else + /* The way the SysTick is clocked is not modified in case it is not the same + as the core. */ + #define portNVIC_SYSTICK_CLK_BIT ( 0 ) +#endif + + +#if configUSE_TICKLESS_IDLE == 1 + #error SysTick port for RF52 does not support tickless idle. Use RTC mode instead. +#endif /* configUSE_TICKLESS_IDLE */ + +/*-----------------------------------------------------------*/ + +void xPortSysTickHandler( void ) +{ + /* The SysTick runs at the lowest interrupt priority, so when this interrupt + executes all interrupts must be unmasked. There is therefore no need to + save and then restore the interrupt mask value as its value is already + known. */ + ( void ) portSET_INTERRUPT_MASK_FROM_ISR(); + { + /* Increment the RTOS tick. */ + if ( xTaskIncrementTick() != pdFALSE ) + { + /* A context switch is required. Context switching is performed in + the PendSV interrupt. Pend the PendSV interrupt. */ + SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; + __SEV(); + } + } + portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 ); +} + +/*-----------------------------------------------------------*/ + +/* + * Setup the systick timer to generate the tick interrupts at the required + * frequency. + */ +void vPortSetupTimerInterrupt( void ) +{ + /* Set interrupt priority */ + NVIC_SetPriority(SysTick_IRQn, configKERNEL_INTERRUPT_PRIORITY); + /* Configure SysTick to interrupt at the requested rate. */ + SysTick->LOAD = ROUNDED_DIV(configSYSTICK_CLOCK_HZ, configTICK_RATE_HZ) - 1UL; + SysTick->CTRL = ( portNVIC_SYSTICK_CLK_BIT | SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk ); +} + +/*-----------------------------------------------------------*/ + +#elif configTICK_SOURCE == FREERTOS_USE_RTC + +#if configUSE_16_BIT_TICKS == 1 +#error This port does not support 16 bit ticks. +#endif + +#include "nrf_rtc.h" +#include "nrf_drv_clock.h" + +/*-----------------------------------------------------------*/ + +void xPortSysTickHandler( void ) +{ +#if configUSE_TICKLESS_IDLE == 1 + nrf_rtc_event_clear(portNRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0); +#endif + + BaseType_t switch_req = pdFALSE; + uint32_t isrstate = portSET_INTERRUPT_MASK_FROM_ISR(); + + uint32_t systick_counter = nrf_rtc_counter_get(portNRF_RTC_REG); + nrf_rtc_event_clear(portNRF_RTC_REG, NRF_RTC_EVENT_TICK); + + if (configUSE_DISABLE_TICK_AUTO_CORRECTION_DEBUG == 0) + { + /* check FreeRTOSConfig.h file for more details on configUSE_DISABLE_TICK_AUTO_CORRECTION_DEBUG */ + TickType_t diff; + diff = (systick_counter - xTaskGetTickCount()) & portNRF_RTC_MAXTICKS; + + /* At most 1 step if scheduler is suspended - the xTaskIncrementTick + * would return the tick state from the moment when suspend function was called. */ + if ((diff > 1) && (xTaskGetSchedulerState() != taskSCHEDULER_RUNNING)) + { + diff = 1; + } + while ((diff--) > 0) + { + switch_req |= xTaskIncrementTick(); + } + } + else + { + switch_req = xTaskIncrementTick(); + } + + /* Increment the RTOS tick as usual which checks if there is a need for rescheduling */ + if ( switch_req != pdFALSE ) + { + /* A context switch is required. Context switching is performed in + the PendSV interrupt. Pend the PendSV interrupt. */ + SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; + __SEV(); + } + + portCLEAR_INTERRUPT_MASK_FROM_ISR( isrstate ); +} + +/* + * Setup the RTC time to generate the tick interrupts at the required + * frequency. + */ +void vPortSetupTimerInterrupt( void ) +{ + /* Request LF clock */ + nrf_drv_clock_lfclk_request(NULL); + + /* Configure SysTick to interrupt at the requested rate. */ + nrf_rtc_prescaler_set(portNRF_RTC_REG, portNRF_RTC_PRESCALER); + nrf_rtc_int_enable (portNRF_RTC_REG, RTC_INTENSET_TICK_Msk); + nrf_rtc_task_trigger (portNRF_RTC_REG, NRF_RTC_TASK_CLEAR); + nrf_rtc_task_trigger (portNRF_RTC_REG, NRF_RTC_TASK_START); + nrf_rtc_event_enable(portNRF_RTC_REG, RTC_EVTEN_OVRFLW_Msk); + + NVIC_SetPriority(portNRF_RTC_IRQn, configKERNEL_INTERRUPT_PRIORITY); + NVIC_EnableIRQ(portNRF_RTC_IRQn); +} + +#if configUSE_TICKLESS_IDLE == 1 + +void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) +{ + /* + * Implementation note: + * + * To help debugging the option configUSE_TICKLESS_IDLE_SIMPLE_DEBUG was presented. + * This option would make sure that even if program execution was stopped inside + * this function no more than expected number of ticks would be skipped. + * + * Normally RTC works all the time even if firmware execution was stopped + * and that may lead to skipping too much of ticks. + */ + TickType_t enterTime; + + /* Make sure the SysTick reload value does not overflow the counter. */ + if ( xExpectedIdleTime > portNRF_RTC_MAXTICKS - configEXPECTED_IDLE_TIME_BEFORE_SLEEP ) + { + xExpectedIdleTime = portNRF_RTC_MAXTICKS - configEXPECTED_IDLE_TIME_BEFORE_SLEEP; + } + /* Block all the interrupts globally */ +#ifdef SOFTDEVICE_PRESENT + do{ + uint8_t dummy = 0; + uint32_t err_code = sd_nvic_critical_region_enter(&dummy); + APP_ERROR_CHECK(err_code); + }while (0); +#else + __disable_irq(); +#endif + + enterTime = nrf_rtc_counter_get(portNRF_RTC_REG); + + if ( eTaskConfirmSleepModeStatus() != eAbortSleep ) + { + TickType_t xModifiableIdleTime; + TickType_t wakeupTime = (enterTime + xExpectedIdleTime) & portNRF_RTC_MAXTICKS; + + /* Stop tick events */ + nrf_rtc_int_disable(portNRF_RTC_REG, NRF_RTC_INT_TICK_MASK); + + /* Configure CTC interrupt */ + nrf_rtc_cc_set(portNRF_RTC_REG, 0, wakeupTime); + nrf_rtc_event_clear(portNRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0); + nrf_rtc_int_enable(portNRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK); + + __DSB(); + + /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can + * set its parameter to 0 to indicate that its implementation contains + * its own wait for interrupt or wait for event instruction, and so wfi + * should not be executed again. However, the original expected idle + * time variable must remain unmodified, so a copy is taken. */ + xModifiableIdleTime = xExpectedIdleTime; + configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); + if ( xModifiableIdleTime > 0 ) + { +#if 0 // With FreeRTOS sd_app_evt_wait increases power consumption with FreeRTOS compared to _WFE (NRFFOSDK-11174) +#ifdef SOFTDEVICE_PRESENT + if (nrf_sdh_is_enabled()) + { + uint32_t err_code = sd_app_evt_wait(); + APP_ERROR_CHECK(err_code); + } + else +#endif +#endif // (NRFFOSDK-11174) + { + /* No SD - we would just block interrupts globally. + * BASEPRI cannot be used for that because it would prevent WFE from wake up. + */ + do{ + __WFE(); + } while (0 == (NVIC->ISPR[0] | NVIC->ISPR[1])); + } + } + configPOST_SLEEP_PROCESSING( xExpectedIdleTime ); + + nrf_rtc_int_disable(portNRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK); + nrf_rtc_event_clear(portNRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0); + + /* Correct the system ticks */ + { + TickType_t diff; + TickType_t exitTime; + + nrf_rtc_event_clear(portNRF_RTC_REG, NRF_RTC_EVENT_TICK); + nrf_rtc_int_enable (portNRF_RTC_REG, NRF_RTC_INT_TICK_MASK); + + exitTime = nrf_rtc_counter_get(portNRF_RTC_REG); + diff = (exitTime - enterTime) & portNRF_RTC_MAXTICKS; + + /* It is important that we clear pending here so that our corrections are latest and in sync with tick_interrupt handler */ + NVIC_ClearPendingIRQ(portNRF_RTC_IRQn); + + if ((configUSE_TICKLESS_IDLE_SIMPLE_DEBUG) && (diff > xExpectedIdleTime)) + { + diff = xExpectedIdleTime; + } + + if (diff > 0) + { + vTaskStepTick(diff); + } + } + } +#ifdef SOFTDEVICE_PRESENT + uint32_t err_code = sd_nvic_critical_region_exit(0); + APP_ERROR_CHECK(err_code); +#else + __enable_irq(); +#endif +} + +#endif // configUSE_TICKLESS_IDLE + +#else // configTICK_SOURCE + #error Unsupported configTICK_SOURCE value +#endif // configTICK_SOURCE == FREERTOS_USE_SYSTICK diff --git a/portable/ThirdParty/GCC/nrf52840-dk/portmacro.h b/portable/ThirdParty/GCC/nrf52840-dk/portmacro.h new file mode 100644 index 00000000000..34584980d07 --- /dev/null +++ b/portable/ThirdParty/GCC/nrf52840-dk/portmacro.h @@ -0,0 +1,36 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +#include "portmacro_cmsis.h" + +#endif /* PORTMACRO_H */ + diff --git a/portable/ThirdParty/GCC/nrf52840-dk/portmacro_cmsis.h b/portable/ThirdParty/GCC/nrf52840-dk/portmacro_cmsis.h new file mode 100644 index 00000000000..3d2dee5cb5c --- /dev/null +++ b/portable/ThirdParty/GCC/nrf52840-dk/portmacro_cmsis.h @@ -0,0 +1,187 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef PORTMACRO_CMSIS_H +#define PORTMACRO_CMSIS_H +#include "app_util.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short +#define portSTACK_TYPE uint32_t +#define portBASE_TYPE long + +typedef portSTACK_TYPE StackType_t; +typedef long BaseType_t; +typedef unsigned long UBaseType_t; + +#if ( configUSE_16_BIT_TICKS == 1 ) + typedef uint16_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffff +#else + typedef uint32_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffffffffUL + + /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do + not need to be guarded with a critical section. */ + #define portTICK_TYPE_IS_ATOMIC 1 +#endif +/*-----------------------------------------------------------*/ + +/* Architecture specifics. */ +#define portSTACK_GROWTH ( -1 ) +#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) +#define portBYTE_ALIGNMENT 8 + +/* RTC register */ +#define portNRF_RTC_REG NRF_RTC1 +/* IRQn used by the selected RTC */ +#define portNRF_RTC_IRQn RTC1_IRQn +/* Constants required to manipulate the NVIC. */ +#define portNRF_RTC_PRESCALER ( (uint32_t) (ROUNDED_DIV(configSYSTICK_CLOCK_HZ, configTICK_RATE_HZ) - 1) ) +/* Maximum RTC ticks */ +#define portNRF_RTC_MAXTICKS ((1U<<24)-1U) +/*-----------------------------------------------------------*/ + +/* Scheduler utilities. */ +#define portYIELD() do \ +{ \ + /* Set a PendSV to request a context switch. */ \ + SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; \ + __SEV(); \ + /* Barriers are normally not required but do ensure the code is completely \ + within the specified behaviour for the architecture. */ \ + __DSB(); \ + __ISB(); \ +}while (0) + +#define portEND_SWITCHING_ISR( xSwitchRequired ) if ( (xSwitchRequired) != pdFALSE ) portYIELD() +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +/*-----------------------------------------------------------*/ + +/* Critical section management. */ +extern void vPortEnterCritical( void ); +extern void vPortExitCritical( void ); +#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortSetBASEPRI(x) +#define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI() +#define portENABLE_INTERRUPTS() vPortSetBASEPRI(0) +#define portENTER_CRITICAL() vPortEnterCritical() +#define portEXIT_CRITICAL() vPortExitCritical() + +/*-----------------------------------------------------------*/ + +/* Task function macros as described on the FreeRTOS.org WEB site. These are +not necessary for to use this port. They are defined so the common demo files +(which build with all the ports) will build. */ +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) +/*-----------------------------------------------------------*/ + +/* Tickless idle/low power functionality. */ +#ifndef portSUPPRESS_TICKS_AND_SLEEP + extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); + #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) +#endif +/*-----------------------------------------------------------*/ + +/* Architecture specific optimisations. */ +#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION + #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 +#endif + +#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 + + /* Count leading zeros helper. */ + #define ucPortCountLeadingZeros( bits ) __CLZ( bits ) + + /* Check the configuration. */ + #if ( configMAX_PRIORITIES > 32 ) + #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice. + #endif + + /* Store/clear the ready priorities in a bit map. */ + #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) + #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) + + /*-----------------------------------------------------------*/ + + #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - ucPortCountLeadingZeros( ( uxReadyPriorities ) ) ) + +#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ + +/*-----------------------------------------------------------*/ + +#ifdef configASSERT + void vPortValidateInterruptPriority( void ); + #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() +#endif + +/*-----------------------------------------------------------*/ + +#define vPortSetBASEPRI( ulNewMaskValue ) __set_BASEPRI(ulNewMaskValue) + +/*-----------------------------------------------------------*/ + +#define vPortRaiseBASEPRI( ) vPortSetBASEPRI(configMAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) + +/*-----------------------------------------------------------*/ + +__STATIC_INLINE uint32_t ulPortRaiseBASEPRI( void ) +{ + uint32_t ulOriginalBASEPRI = __get_BASEPRI(); + vPortRaiseBASEPRI(); + return ulOriginalBASEPRI; +} + +/*-----------------------------------------------------------*/ + + +#ifdef __cplusplus +} +#endif + +#endif /* PORTMACRO_CMSIS_H */ +